How to Use the MAX20058 and MAX20059 for Negative Output Voltage Applications
The increasing need for ADAS features and introduction of EVs/HEVs are raising the demand for electronic content in automotive applications, driving the need for a variety of power management solutions. Many applications such as the APD bias supply for LIDAR (light detection and ranging) applications, gate driver bias supplies, bias for controllers, and other sensors need negative output voltage rails.
The Maxim portfolio of high-voltage synchronous buck regulators offers low power loss, small solution size, and low noise, thus meeting the stringent automotive requirements of customers. This application note demonstrates techniques to use a synchronous buck regulator (MAX20058/MAX20059) to generate negative voltages.
The MAX20058/59 IC can be configured to work in an inverting buck-boost topology to produce negative output voltage from positive input voltage. This application note explains the process. A -24V output voltage application is used to demonstrate the principle.
Table 1. Negative Output Voltage (Power Supply Requirements)
|VIN||Operating Input Voltage||5V TO 40V|
|IOUT||Maximum Output Current||50mA|
|VIN_ripple||Steady-State Input Ripple||1% of Nominal VIN|
|VOUT_ripple||Steady-State Output Ripple||1% of Nominal VOUT|
Range of the Operating Input Voltage
The sum of the maximum operating input voltage and absolute value of the output voltage must not exceed the maximum operating voltage (80V for MAX20059 and 65V for MAX20058) for the negative output application. It is expressed as:
VIN_MAX + | VOUT | < 80V
So, the maximum operating input voltage can be as high as 56V for a -24V output voltage. The minimum operating input voltage for the negative output voltage application must be greater than 4.5V.
Calculating the Duty Ratio
The duty ratio and output voltage, ignoring the losses associated with the power switches and inductor DC resistance, are expressed as follows:
The duty cycle varies between 0.83 at 5V to 0.38 at 40V input voltage. The highest duty ratio (DMAX) occurs at the minimum operating input voltage and lowest duty ratio (DMIN) at the maximum operating input voltage (VIN_MAX).
Selecting the Inductor
Specify three key inductor parameters for operation with the device: inductance value (L), inductor saturation current (ISAT), and DC resistance (RDCR). Select the ratio of the inductor peak-to-peak AC current to DC average current (LIR) to select the inductor value. A 40% peak-to-peak ripple current to average-current ratio (LIR = 0.4) is a good compromise between size and loss. The peak current limit of the MAX20059 is 1.6A in the PWM (pulse-width-modulated) mode. The switching frequency, input voltage, output voltage, and selected LIR then determine the inductor value as follows:
VOUT, IOUT, and fSW are nominal values here. Select a low-loss inductor closest to the calculated value with acceptable dimensions and lowest possible DC resistance. The saturation current rating (ISAT) of the inductor must be high enough so that saturation occurs only above the peak current-limit value. The next equation ensures the internal compensation slope is greater than 50% of the inductor current down slope:
m is the internal compensating slope and m2 is the sensed inductor current downslope as follows:
m is the internal slope compensation with the value in Table 2, m2 is the inductor current downslope, and RI is the current-sense gain of 0.5 (typ):
Table 2. Internal Slope Compensation vs. Switching Frequency
|Switching Frequency (kHz)||Internal Slope Compenation m(V/µs)|
Select the larger of LMIN1 and LMIN2 as the nominal inductor value:
L = max(LMIN1,LMIN2)
Select the inductor with the standard inductor value closest to L. The saturation current of the selected inductor must be greater and peak current smaller than the peak current limits of the MAX20059.
The small inductance can reduce the negative impact of the right half plane on the phase margin of the crossover frequency. Choose a 56µH inductor here.
Selecting the Input Capacitor
The input capacitor is important to reduce the current peaks drawn from the input supply, increase efficiency, and reduce noise injection. The value of CIN largely depends on the source impedance of the input supply. The higher the source impedance, higher the input capacitance. Place a ceramic capacitor at the input of the MAX20059 to reduce the voltage ripple. An X7R ceramic capacitor is recommended for automotive industry standards. The following equation determines the minimum value needed for this design:
A 2.2µF, 100V, and 10% X7R is chosen because of the derating value of the capacitor. The actual capacitance is properly derated in ceramic capacitors according to the applied DC voltage. Refer to the manufacturer data sheets for the ceramic capacitors for more accurate derating models.
Selecting the Output Capacitor
The output ripple comprises ΔVQ (caused by the capacitor discharge) and ΔVESR (caused by the ESR of the output capacitor). Use low-ESR ceramic or aluminum electrolytic capacitors at the output. The ΔVESR contributes the entire output ripple for aluminum electrolytic capacitors. The output filter capacitor must have enough capacitance and sufficiently low ESR to meet the output-ripple requirements. The output capacitance, to satisfy the specified output-voltage ripple, is calculated as:
The size, when using low-ESR (e.g., ceramic) output capacitors, is usually determined by the capacitance required to maintain the output voltage within the specification during load transients. It is estimated as:
VREF is the reference of the feedback voltage with the value of 0.8V, GM is the gain of the transconductance error amplifier with the value of 60µA/V (typ), RCOMP is the compensation network resistor with the value of 185kΩ, RI is the current-sense gain of 0.5 (typ), fC is the desired loop crossover frequency, and 10kHz is assumed.
Select the larger of COUT(MIN1) and COUT(MIN2) as the output capacitor.
COUT = max (COUT(MIN1),COUT(MIN2)
A 2.2µF, 100V, and 10% X7R is chosen because of the derating value of the capacitor. Consider capacitance tolerance, temperature, and voltage derating for any calculations involving COUT. The actual capacitance is properly derated in ceramic output capacitors according to the applied DC voltage. Refer to the manufacturer’s data sheets for the output capacitors for more accurate derating models.
Selecting the Feedforward Cap
Increase the phase margin and bandwidth by paralleling C6 with the top resistor R5 of the feedback resistance divider to provide a zero around the desired crossover frequency (fC). Assign a fixed value for R5 and vary R6 to set the output voltage.
A 47pF cap can increase the phase margin and bandwidth here. A feedforward cap is not used for this design.
Adjusting the Output Voltage
Set the output voltage with a resistive voltage-divider connected from the ground terminal of the inductor to the output voltage. Connect the center node of the divider to the FB (feedback) pin. Assign a fixed value for R5 and vary R6 to set the output voltage. Select the values of resistors R5 and R6 as:
Here, R5 and R6 are in kΩ, and their values are 294kΩ and 10kΩ, respectively.
Setting the Input Turn-On Voltage
Set the input voltage to turn on the MAX20059 with a resistive voltage-divider connected from VIN to VOUT (Figure 2). Connect the center node of the divider to the EN/UVLO (enable/undervoltage lockout) pin. Choose R1 as 3.32MΩ and calculate R2 to increase the voltage in the center node of the divider than the EN threshold (1.115V).
Here, VIN is the input voltage to turn on the MAX20059. An R2 value of 750kΩ turns it on at around 6V input voltage.
Internal Loop Compensation
The internal compensation network is as follows:
Figure 1.Internal compensation network.
Selecting the Soft-Start Capacitor
The MAX20059 implements an adjustable soft-start operation to reduce the inrush current. A capacitor connected from the SS (soft-start) pin to the VOUT programs the soft-start period. The soft-start time (tSS) is related to the capacitor connected at the SS (CSS) by the following equation:
CSS = 6.25 × tSS
Here, tSS is measured in milliseconds and CSS in nanofarads. For example, a 12nF capacitor must be connected from the SS pin to the VOUT to program a 2ms soft-start time.
Schematic for the Design
Figure 2.Schematic for the design.
Reference Design 1
VIN = 5V to 40V, VOUT = -24V, IOUT = 50mA, and fSW = 600kHz.
Bill of Materials
Table 3. Bill of Materials for Reference Design 1
|C1||2.2µF/X7R/100V||Input Bypass Capacitor||GRM32ER72A225KA35||Murata||1206||1|
|C2||1µF/X7R/6.3V||VCC Bypass Capacitor||GRM188R70J105KA01||Murata||0805||1|
|C3||12000pF/X7R/25V||Soft-Start Capacitor||Soft-Start Capacitor||Murata||0603||1|
|R1||3.32M ±1%||EN/UVLO Resistor-Divider||CRCW04023M32FK||VISHAY DALE||0402||1|
|R3||243k ±1%||Current Limit and Mode of Operation||ERJ-2RKF2433X||PANASONIC||0402||1|
|R4||69.8k±1%||Set the Switching Frequency and Current Limit||CRCW0402105KFK||VISHAY DALE||0402||1|
|R5||294k½ ±1%||FB Resistor-Divider||CRCW0402294KFKED||VISHAY DALE||0402||1|
|R6||10k½ ±1%||FB Resistor-Divider||CRCW040210K0FKEDC||VISHAY DALE||0402||1|
|U1||MAX20059||Internal Switch Buck Converter||Maxim Integrated||10 TDFN 3 x 3||1|
Figure 3.Steady-state operation with 50mA load, 5VIN, -24VOUT, and 600kHz.
Figure 4. Load transient response from no load to 50mA, 5VIN, -24VOUT, and 600kHz.
Figure 5. Bode plot at 50mA load, 5VIN, -24VOUT, and 600kHz.