アプリケーションノート 7045

How to Select a Driver Amplifier to Maximize the MAX11198 Performance


要約:

This application note discusses various driver amplifiers suitable for the MAX11198, which is a 16-bit, 2Msps, dual simultaneous-sampling SAR ADC with internal reference and features optimized for precision motor control and measurements.


Introduction

The MAX11198 is a 16-bit, 2-channel, 2Msps, SAR analog-to-digital converter (ADC) with simultaneous sampling, balanced differential inputs, and a separate data output for each channel. This ADC features a best-in-class sample rate and resolution in a tiny 2mm x 3mm package. An integrated voltage reference and reference buffers help designers minimize board space, component count, and system cost. The proper choice of input driver amplifiers for different types of applications is essential to fully capture the benefits and the optimal performance of this device. This application note discusses the performance of the MAX11198 with various driver amplifiers and how they are configured for different types of analog input signals. This application note also examines the type of driver amplifier unsuitable for the MAX11198 device.

Analog Inputs

The analog inputs of the MAX11198, AIN+ and AIN-, are designed for balanced differential signals. The input signals range from 0V to VREF. Therefore, the differential input interval [VDIFF = (AIN+) - (AIN-)] ranges from –VREF to +VREF, and the full-scale range is FSR = 2 × VREF. Figure 1 shows the MAX11198 analog input signal voltage ranges.

The MAX11198 analog input signal voltage ranges where VREF + 250mV ≤ VAVDD ≤ 5.25VFigure 1. The MAX11198 analog input signal voltage ranges where VREF + 250mV ≤ VAVDD ≤ 5.25V.

The differential analog input must be centered with respect to a common-mode signal of VREF/2, with a tolerance of ±100mV. The reference voltage can range from 250mV to 2.5V below the reference supply AVDD. This reference voltage range guarantees adequate headroom for the internal reference buffers. Level-shifting and phase conversion can be implemented to achieve the specified input voltage ranges for input signals other than this required unipolar differential configuration. See the Different Configurations of Driver Amplifiers section for more information.

Driver Amplifiers

The ADC driver must have a sufficiently low noise density of 6nV/√Hz or less in the bandwidth of interest because the driver amplifier noise affects the signal-to-noise ratio (SNR) significantly.

Also, the driver amplifiers must have equal or better total harmonic distortion (THD) performance than the MAX11198 to take full advantage of the ADC's excellent dynamic performance. This prevents the driver amplifier distortion in the signal path from limiting the overall system dynamic performance. Table 1 lists some potential ADC driver amplifiers for the MAX11198 ADC.

Table 1. Potential Driver Amplifiers for the MAX11198

Amplifier Input-Noise Density
(nV/√Hz)
THD
(dB)
SIGNAL BANDWIDTH (MHz) VDC
(V)
MAX4432 2.8 N/A 180 ±5V
MAX44242 5 -124 10 2.7V to 20V
MAX44263 12.7 -110 15 1.8V to 5.5V
MAX9944 17.6 N/A 2.4 6V to 38V
MAX44245* 50 -100 1 2.7V to 36V

*Chopper amplifier

MAX11198 ADC Input Filtering

Figure 2 shows how to install a RS and CS network filter to reduce the load transient at the output of the MAX11198 ADC driver amplifier at the start of the track phase.

MAX11198 input filter RS and CSFigure 2. MAX11198 input filter RS and CS.

MAX11198 ADC Dynamic Performance with Various Driver Amplifiers

The MAX11198 dynamic performance was evaluated with various driver amplifiers. The conditions are AVDD = 5V, OVDD = 3.3V, and VREF = 2.5V unless otherwise noted. Table 2 shows the results of the effective number of bits (ENOB).

Table 2. MAX11198 Dynamic Performance ENOB with Various Driver Amplifiers

fIN
(kHz)
Sample Rate (ksps) ENOB
MAX11198 AND MAX44242 MAX11198 AND MAX9944 MAX11198 AND MAX44245 MAX11198 AND MAX44263 MAX11198 AND MAX4432
(VREF = 2.5V)
MAX11198 AND MAX4432
(VREF = 4.096V)
1 100 14.2 14.3 9.6 14 14.5 15
10 50 14.2 14.1 9.6 14 14.5 15
10 100 14.2 14.1 9.6 14 14.5 15
10 500 14.2 14.1 14 14.5 15
10 1000 14 13 9.6 13.8 14.5 15
10 2000 13.1 12.3 13.7 14.4 14.9
100 1000 12.2 9.5 11.3 14.1 14.8
100 2000 12.5 9.5 11.5 14.1 14.8

Table 3 shows the SNR.

Table 3. MAX11198 Dynamic Performance SNR with Various Driver Amplifiers

fIN
(kHz)
Sample Rate (ksps) SNR
MAX11198 AND MAX44242 MAX11198 AND MAX9944 MAX11198 AND MAX44245 MAX11198 AND MAX44263 MAX11198 AND MAX4432
MAX11198 AND MAX4432
(VREF = 4.096V)
1 100 87.5 87.8 59.8 86.1 89.2 92.4
10 50 87.5 87.5 59.8 86 89.1 92.3
10 100 87.4 87.6 59.9 86.1 89.1 92.3
10 500 87.3 87.4 59.6 86 89.2 92.4
10 1000 86.2 80.3 59.3 85.1 89.1 92.3
10 2000 81 75.8 84.6 88.7 91.9
100 1000 83.5 73.4 79.6 87.2 91
100 2000 80.4 72 78.3 84.3 91

Table 4 shows the THD.

Table 4. MAX11198 Dynamic Performance THD with Various Driver Amplifiers

fIN
(kHz)
Sample Rate (ksps) THD
MAX11198 AND MAX44242 MAX11198 AND MAX9944 MAX11198 AND MAX44245 MAX11198 AND MAX44263 MAX11198 AND MAX4432
MAX11198 AND MAX4432
(VREF = 4.096V)
1 100 107.1 110.6 86.2 109.1 111.2 112.2
10 50 104.7 94 86.1 111 111.6 112.6
10 106.9 116.2 94.5 76.7 108.9 110.9 112.4
10 500 107.6 94.1 108.1 111.8 114.4
10 1000 106.6 92.8 73.5 102.7 110.1 114.1
10 2000 94.2 89.1 99 108.8 107.2
100 1000 75.7 59.2 70.2 97.6 102.5
100 2000 79.5 59.5 71.8 95.7 104.8

Figure 3 summarizes the MAX11198 ENOB with different driver amplifiers at 10kHz.

MAX11198 ENOB vs. sample rate with different driver amplifiersFigure 3. MAX11198 ENOB vs. sample rate with different driver amplifiers.

Figures 4 shows the dynamic performance of the MAX11198 with the MAX4432 driver amplifier captured by the MAX11198 evaluation kit (EV kit) software graphic user interface (GUI) at 1kHz/100ksps.

The MAX4432 yields the best dynamic performance as it has the lowest noise density of 2.8nV/√Hz and the widest bandwidth of 180MHz. The MAX44245 on the other hand produces the worst dynamic performance because it has the highest noise of 50nV/√Hz and the narrowest bandwidth of only 1MHz.

Note that the MAX44245 is a chopper amplifier intended for use as a buffer for voltage reference because it is designed for a very low offset voltage of only 2µV typical. Therefore, avoid using this type of chopper amplifier to drive high-performance ADCs.

The MAX11198 with the MAX4432 driver amplifier dynamic performance at fIN = 1kHz, sample rate = 100ksps, and VREF = 4.096VFigure 4. The MAX11198 with the MAX4432 driver amplifier dynamic performance at fIN = 1kHz, sample rate = 100ksps, and VREF = 4.096V.

Different Configurations of Driver Amplifiers

The MAX11198 accepts unipolar differential input signals. Analog input signals that are not unipolar differential such as single-ended unipolar, single-ended bipolar, and differential bipolar require conversion to unipolar differential signals. Figures 5 to 7 depict how to transform the different input signals to the desired unipolar differential configuration.

Single-Ended Unipolar Signal

The circuit in Figure 5A shows how a single-ended, unipolar signal is converted to the differential, unipolar signal configuration. The amplifier A1 is used as a buffer and its output is the same as the input signal from 0V to +VREF. The second amplifier A2 is an inverting amplifier with a DC voltage of VREF/2 at its noninverting + side. This configuration allows A2 to invert the input signal from (0V to +VREF) to (+VREF to 0V).

Conversion of input signal from single-ended unipolar to differential unipolar signalsFigure 5A. Conversion of input signal from single-ended unipolar to differential unipolar signals.

The VREF/2 voltage is derived from the MAX11198 internal reference voltage VREF with a buffer (Figure 5B).

The MAX44245 amplifier is chosen as the reference voltage buffer because it has a super low offset voltage of 2µV typical. This ensures that the accuracy of VREF/2 voltage satisfies the MAX11198 common-mode voltage requirement of VREF/2 ± 100mV.

VREF/2 derivation from VREF of the MAX11198Figure 5B. VREF/2 derivation from VREF of the MAX11198.

Differential Unipolar Signal

The circuit in Figure 6 shows how a differential, unipolar signal is converted to the differential unipolar signal configuration. The amplifier A1 is used as a buffer amplifier and its output is the same as the input signal from 0V to +VREF. Similarly, the second amplifier A2 is a buffer amplifier and its output is +VREF to 0V.

Conversion of input signals from differential unipolar to differential unipolar signalsFigure 6. Conversion of input signals from differential unipolar to differential unipolar signals.

Single-Ended Bipolar Signal

The circuit in Figure 7 depicts how a single-ended, bipolar signal is converted to the differential, unipolar signals. The amplifier A1 is an inverting amplifier with a VREF/2 voltage at its noninverting +side to convert the input signal from ±VREF to VREF to 0V. The peak-to-peak input signal is 2VREF (VREF – (-VREF)). The amplifier A1 has a gain of R/2R = 1/2. Therefore, its peak-to-peak output is half of the input signal, which is VREF. The VREF/2 at the noninverting side of A1 generates an offset voltage to its output signal, converting the input signal to VREF to 0V.

Similarly, the second amplifier A2 is an inverting amplifier with a DC voltage of VREF/2 at its noninverting +side. However, A2 is designed for a gain of -1. Together with the VREF/2 voltage at its noninverting side, which generates the offset voltage of VREF/2 to its output signal, amplifier A2 converts its input signal from (VREF to 0V) to (0V to VREF), providing the desired differential, unipolar signals to the MAX11198.

Conversion of input signal from single-ended bipolar to differential unipolar signalsFigure 7. Conversion of input signal from single-ended bipolar to differential unipolar signals.

Differential Bipolar Signals

The circuit in Figure 8 depicts how differential bipolar signals are converted to the differential unipolar signals. The amplifier A1 is an inverting amplifier with a VREF/2 voltage at its noninverting +side to convert the input signal from ±VREF/2 to 0V to VREF. The peak-to-peak input signal is VREF: (VREF/2 – (-VREF/2)). The amplifier A1 has a gain of -1. Therefore, its peak-to-peak output is VREF, which is the same as the input signal. The VREF/2 at the noninverting side of A1 generates an offset voltage to its output signal, converting the input signal to 0V to VREF.

Similarly, the second amplifier A2 is an inverting amplifier with a gain of -1 and a DC voltage of VREF/2 at its non-inverting +side. A2 adds the offset voltage of VREF/2 to its output signal, converting its input signal to VREF to 0V. This is a 180° phase shift of the amplifier A1 output signal that provides the desired unipolar differential signals to the MAX11198.

Conversion of input signals from differential bipolar to differential unipolar signalsFigure 8. Conversion of input signals from differential bipolar to differential unipolar signals.

Conclusion

The MAX11198 is optimized for precision motor control and measurements with the implementation of dual differential ADCs with a high sampling rate of 2Msps and an accurate internal reference voltage. The differential inputs reduce the noise from the motor. The high sampling rate of 2Msps is a perfect feature for the high-speed application demanded by the motor. Also, the internal reference voltage allows the designer to implement circuitry to convert analog input signals to a differential unipolar configuration for optimum performance, and saves board space and system cost. The MAX4432 is the best driver amplifier for the MAX11198 based on the experimental data in the lab because of the high-input frequency at 100kHz and high sampling rate of 2Msps. The other driver amplifiers such as the MAX44242 and MAX44263 are also good selections for input frequency up to 10kHz.