キーワード: power solution, switching regulator, internal compensation, wide-bandwidth internal compensation, wide loop bandwidth, power supply circuit, power supply
PCBs for today’s designs are already quite crowded, particularly to accommodate the end product’s key features. This is why system engineers work hard to shrink the size of the power solution. There are various techniques for reducing the size of the power solution. One such technique is internal compensation, in which the cumbersome external feedback compensation network is integrated into the IC.
Internal compensation, however, is not without drawbacks. This method can impact the power solution loop’s bandwidth and stability. Let us take a closer look at various internal compensation techniques, one of which offers wide loop bandwidth to achieve high integration without the loop’s bandwidth and stability tradeoffs.
Figure 1 shows a typical power supply circuit with its feedback loop and external compensation circuit. The compensation circuit is optimized to a specific operating condition (input voltage, output voltage, switching frequency, and output capacitor). When one or more of the circuit operating parameters changes, the compensation circuit value(s) must be changed to optimize the loop performance according to the new circuit operating condition.
Figure 1. Buck converter schematic showing external compensation.
Simple internal compensation essentially integrates this compensation circuit, which is optimized for one specific operating condition, into the IC. The IC with this internal compensation circuit works just fine, until one or more operating parameter(s) changes. Figure 2 depicts a power solution with simple internal compensation.
Figure 2. Buck converter schematic showing simple internal compensation.
The internal compensation is optimized for one specific operating condition. At this particular operating condition, this converter works great. However, it is also limited to this operating condition. Its performance degrades when the operating condition changes (e.g., changing VO, FSW, and/or CO values).
Figure 3 shows a schematic of a buck converter that uses smart, wide-bandwidth internal compensation. This technique allows adjustment to suit different circuit conditions and retains optimized loop bandwidth for a wide range of operating circuit parameters. It also minimizes the number of external components to yield a highly integrated, compact power solution.
Figure 3. Buck converter schematic showing smart, wide-bandwidth internal compensation.
Here, we present an example of a buck converter implementing a simple internal compensation technique. Figure 4a, Figure 4b, and Table 1 provide its schematic, evaluation board, and bill of materials (BOM).
Figure 4a. Buck converter schematic showing simple internal compensation.
Figure 4b. Evaluation board of buck converter with simple internal compensation.Table 1. BOM for Buck Converter with Simple Internal Compensation
|C04, C05||CAP, CERM, 0.022µF, 100V, +/-5%, X7R, 0805||2|
|CBIAS||CAP, CERM, 4.7µF, 50V, +/-10%, X5R, 0805||1|
|CBOOT||CAP, CERM, 0.47µF, 16V, +/-10%, X7R, 0805||1|
|CFF||CAP, CERM, 100pF, 50V, +/-5%, C0G/NP0, 0603||1|
|CIN1||CAP, CERM, 0.47µF, 100V, +/-10%, X7R, 0805||1|
|CIN2||CAP, CERM, 1µF, 100V, +/-10%, X7R, 1210||1|
|CIN3||CAP, CERM, 10µF, 100V, +/-20%, X7S, 2220||1|
|CO1, CO2||CAP, CERM, 47µF, 10V, +/-10%, X7R, 1210||2|
|CO3||CAP, CERM, 1µF, 25V, +/-10%, X5R, 0805||1|
|CSS||CAP, CERM, 0.047µF, 50V, +/-10%, X7R, 0603||1|
|CVCC1||CAP, CERM, 2.2µF, 10V, +/-10%, X7R, 0603||1|
Inductor, shielded drum core, ferrite, 10µH, 5.35A, 0.0189Ω, SMD, Coiltronics® DR125-100-R 1
|U1||3.5- 60V 2A step-down converter||1|
This particular buck converter employs fixed-frequency peak current mode control. The device is internally compensated. The switching frequency is programmable from 200kHz to 2.2MHz by an external resistor, RT. It defaults at 500kHz without RT. The internal compensation is optimized for 24V input, 3.3V output, 500kHz switching frequency, and output capacitor of 2 x 47µF ceramic. While this converter works well at this specific operating condition, it is also limited to this operating condition. Its performance degrades when the operating condition changes (e.g., changing VO, FSW, and/or CO values).
We can see the limitations of simple internal compensation by looking at the converter’s responses to load step transient at various circuit operating conditions. Figure 5a shows a test result with the original configuration (2 x 47µF), while Figure 5b shows the result with twice the amount of output capacitor (4 x 47µF).
Figure 5a. Load transient performance - simple compensation, original configuration (CO – 2 x 47µF).
Figure 5b. Load transient performance - simple compensation, doubling output capacitance (CO – 4 x 47µF).
In Figure 5a and Figure 5b, the purple trace is the output load current stepping from 1A to 2A and back to 1A. The green trace is the output voltage showing deviation in response to the load changes. An ideal converter has no voltage deviation when the load changes (i.e. the green line would be flat). A faster converter has less voltage deviation. A stable converter has a well-behaved output voltage waveform that recovers smoothly from the deviation.
This original circuit (2 x 47µF) has a 150mV peak-to-peak (pk-pk) voltage deviation. When doubling the output capacitor to 4 x4 7µF, we expect the voltage deviation to be reduced to half. But because of the limitation of simple internal compensation, increases in the output capacitance consequently reduce the converter loop bandwidth, which adversely affects the converter performance. Therefore, we measured 134mV pk-pk in this case.
So, with simple (limited) internal compensation, doubling the output capacitance only reduces the output load transient response pk-pk slightly to 89%. This 11% reduction figure does not justify the cost and size increase for adding the output capacitor. System engineers are stuck with the original converter performance. Attempts to improve output voltage deviation performance further results in exponential cost and size increases.
Figure 6a, Figure 6b, and Table 2 show the schematic, evaluation kit board, and BOM of the buck converter with smart, wide-bandwidth internal compensation.
Figure 6a. Buck converter with wide-bandwidth internal compensation.
Figure 6b. Evaluation board of buck converter with wide-bandwidth internal compensation.Table 2. BOM for Buck Converter with Wide-Bandwidth Internal Compensation
|C1||2.2μF ±10%, 100V X7R ceramic capacitor (1210)||1|
|C2||2.2μF ±10%, 10V X7R ceramic capacitor (0603)||1|
|C3||5600pF ±10%, 25V X7R ceramic capacitor (0402)||1|
|C4||47µF ±10%, 10V X7R ceramic capacitor (1210)||1|
|C5||0.1µF ±10%, 16V X7R ceramic capacitor (0402)||1|
|C7||47µF, 80V aluminum electrolytic capacitor (D = 10mm)||1|
|L1||6.8μH, 5A inductor. Coilcraft® MSS1048-682NL. Taiyo Yuden® NS10165T6R8NNA||1|
|U1||4.5V-60V, 2.5A, high-efficiency, synchronous step-down DC-DC converter with internal compensation||1|
This particular converter is also a fixed-frequency peak current mode control device. However, it features smart, wide-bandwidth internal compensation. The switching frequency of its evaluation kit is defaulted to 450kHz. The internal compensation is optimized for 24V input, 3.3V output, 450kHz switching frequency, and output capacitor of 47µF ceramic. Note that this is only half the amount of the output capacitance on the other board discussed earlier. This buck converter requires only half of the amount of output capacitance for a comparable output transient response because of its wide loop bandwidth.
To examine the performance of smart, wide-bandwidth internal compensation, observe the converter responses to load step transient at various circuit operating conditions. Figure 7a shows a test result with the original configuration (47µF), while Figure 7b shows the result with twice the amount of output capacitor (2 x 47µF).
Figure 7a. Load transient performance - smart, wide-bandwidth compensation in original configuration (Co = 47µF, R3 = 127k, R4 = 47.5k).
Figure 7b. Load transient performance - smart, wide-bandwidth compensation with double the output capacitance (Co = 2 x 47µF, R3 = 52.3k, R4 = 19.6k).
The original circuit (47µF) has a 176mV pk-pk voltage deviation. When the output capacitor is doubled, to 2 x 47uF, the voltage deviation reduces to 48% at 84mV pk-pk thanks to its smart, wide-bandwidth internal compensation. The well-behaved recovering wave shape of the output voltage after each deviation also shows very stable loop operation. In addition, compared to the simple internal compensation solution, this converter originally requires only half of the amount of output capacitance for a comparable output transient response because of its wide loop bandwidth.
Table 3 shows a side-by-side comparison of the simple internal compensation buck converter with the option for smart, wide-bandwidth internal compensation.Table 3. Comparing Two Types of Buck Converters
|Simple internal Compensation||Smart, Wide-Bandwidth Internal Compensation|
|Output Capacitance||VO Deviation, pk-pk||Output Capacitance||VO Deviation, pk-pk|
|Original Configuration||2 x 47µF||150mV||47µF||176mV|
|Doubling Output Capacitance||4 x 47µF||134mV||2 x 47µF||84mV|
|Percentage VO Deviation Reduction||-||11%||-||52%|
Note that you should use a low-noise scope probe when measuring the output voltage load transient response. Figure 8 shows what was used to measure these voltages. Equipment used in this experiment includes the following:
Figure 8. Low-noise probe technique used for measuring output voltage load transient response.
For higher integration power solutions, internal compensation helps reduce external component count and circuit complexity. Simple internal compensation comes with lower system performance and can also cause loop instability. Smart, wide-bandwidth internal compensation, which is available in the MAX17503, and in many of Maxim's Himalaya converter and power module products, achieves the best of both worlds: high integration while maintaining optimum loop bandwidth and control loop stability, reducing size and cost by minimizing the external output capacitance requirement.
A similar version of this application note appeared on Electronics for U on July 24, 2018.
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