Tuner Configuration for Faster Lock Time
The MAX2112/MAX2120/MAX2121 VCO autoselect (VAS) circuits are hardwired for a clock period of 57340/fXTAL. Given MAX2120 and fXTAL = 4MHz, this translates to a VAS clock period of 14.34ms. If the VAS must transition from the lowest to highest frequency VCO, the lock time would be approximately 14.34ms x 23 bands, or 330ms. This can be unacceptably slow for many applications. This number can be cut down to 172ms by simply programming the VCO[4:0] bits of Register 07 to 10011, which seeds the VAS operation from nearly the center of the VCO range.
Configuration for Faster Lock Time
For the fastest possible lock time, the VCO[4:0] bits can be seeded according to the following algorithm, given a desired LO frequency (fLO):
- Enable VAS mode by programming the VAS bit to 1 (Reg 07).
- Choose VCO divider mode (bit D24 of Reg 06) and calculate fVCO:
If fLO ≤ 1125MHz:
Program bit D24 (Reg 06) to 1 (divide-by-4 mode)
fVCO = fLO x 4
D24 = 0 (divide-by-2 mode)
fVCO = fLO x 2
- Choose VCO seed value (VCO[4:0]) based on lookup table (see Table 1):
If fVCO < f2_3, then VCO[4:0] = 01010 (VCO2).
Else, if fVCO < f3_4, then VCO[4:0] = 01011 (VCO3).
Else, if fVCO < f4_5, then VCO[4:0] = 01100 (VCO4).
. . .
Else, if fVCO < f21_22, then VCO[4:0] = 11101 (VCO21).
Else, if fVCO < f22_23, then VCO[4:0] = 11110 (VCO22).
Else VCO[4:0] = 11111 (VCO23).
- Calculate and load N counter value (and F counter value for MAX2112/MAX2120/MAX2121).
- For the MAX2112, the F counter LSB word must be loaded last to initiate a new VAS sequence.
- For the MAX2120/MAX2121, the N counter LSB word must be loaded last to initiate a new VAS sequence.
This algorithm seeds the VCO to within ±2 VCOs and thus guarantees a lock time of < 14.34ms × 2 < 30ms for the MAX2112/MAX2120/MAX2121 using a 4MHz XTAL. The MAX2112/MAX2120/MAX2121’s lock time is faster by the ratio of fXTAL/4MHz.Table 1. Lookup Table for VCO Seed Values
|VCO Transition Frequency (MHz)|
Note: Since the minimum required VCO frequency is 2250MHz (1125MHz x 2), the algorithm starts with "if fVCO < f2_3," which is close to 2250MHz.