The MAXREFDES74# is a high-speed, 18-bit precision data-acquisition system featuring the MAX11156 ADC and MAX5318 DAC. The reference design allows for both unipolar and bipolar modes of operation from a single +15V to +20V DC source. The unipolar mode operates as expected; however, the bipolar mode contains a potential power sequencing issue upon startup if J6 is in position 1-2. This only applies to boards using a 100kΩ resistor for R31.
The reference design uses a single +15V to +20V power source, an on-board transformer to create power isolation, and relies on several regulators to generate the power rails necessary for board operation. When operating in bipolar mode, J6 connects the MAX664 regulator output to AVSS of the MAX5318. Figure 1 provides a block diagram of the connections between the MAX5318 and MAX664 along with the power supplies to each chip.
Figure 1. MAXREFDES74# schematic for DAC AVSS generation.
On the MAXREFDES74#, the +5V supply to the MAX5318 always powers on prior to the -1.3V supply. Before the MAX664 can provide a regulated output, a ~0.65V appears on the AVSS pin of the MAX5318. Based on the schematic connections, this positive voltage appears on the VOUT1, VOUT2, VSET, and SENSE pins on the MAX664, raising these pins above their absolute maximum value of +0.3V as specified in the MAX664 data sheet. Figure 2 shows an oscilloscope capture of the power-on sequencing when conditioned for bipolar operation. The positive rail powers on first and causes a positive voltage to appear on AVSS of the MAX5318.
Figure 2. MAX5318 bipolar power-up sequence. Ch1 = AVDD (TP11), Ch2 = AVSS (TP14), Ch3 = MAX664 VOUT1VOUT2 (J6).
Since the absolute maximum voltage on VSET, SENSE, VOUT1, and VOUT2 are exceeded when the positive supply powers on first, internal components of the MAX664 are biased incorrectly and hold the MAX664 in an “off” state. Figure 3 displays the internal block diagram of the MAX664. When VSET is above -50mV, the SENSE pin of the MAX664 can be used to set the regulator output voltage through an internal resistor divider compared to an internal -1.3V reference. When VSET drops below -50mV, its voltage is directly compared to the internal -1.3V reference. Since both pins are improperly biased above GND, the negative output rail is never generated and the board does not operate properly.
Figure 3. Internal block diagram of the MAX664.
There are several solutions that range in complexity to correct the power supply problem when operating MAXREFDES74# in bipolar mode:
Figure 4. Startup sequence obtaining correct voltage rails. Ch3 = AVSS (TP14), Ch4 = AVDD (TP11)
Figure 5. MAX5318 corrected power-up sequence. Ch1 = AVDD (TP11), Ch2 = AVSS (TP14), Ch3 = MAX664 VOUT1/VOUT2 (J6).