アプリケーションノート 6034

How to Select and Design Amplifier Buffer and Passive Components to Optimize Performance for the MAX11905 Evaluation Kits

筆者: Kien Mach

要約: The MAX11905EVKIT# and the MAX11905DIFEVKIT# are two different evaluation kits to demonstrate the MAX11905, 20-bit, 1.6Msps, low-power fully differential SAR ADC. Each kit includes two solutions for the analog front end. The first is design is for low offset and low noise for DC input. The latter is design for high SFDR and low noise for AC input. Details of each design are described in this application note.

Overview

The MAX11905 is a 20-bit, 1.6Msps, low-power fully differential SAR ADC. Both the MAX11905EVKIT# and the MAX11905DIFEVKIT# use a MAX6126, 3.0V voltage reference (VREF). Both inputs of the ADC expect a voltage of 0V to VREF. The differential input range is from (-VREF) to VREF. For the ADC to achieve excellent performance, the proper amplifiers and lowpass filters must be placed at the inputs of the ADC (Figure 1).

Lowpass filter at MAX11905. Figure 1. Lowpass filter at MAX11905.

Lowpass Filter at ADC Input

When selecting a capacitor for the lowpass filter, the voltage rating and capacitor type play an important role on performance. C0G/NP0-type capacitors are the most stable with respect to the frequency and temperature coefficient (±30ppm/°C). Since the capacitor is constantly switching, selecting the highest voltage rating possible ensures the capacitor holds its capacitance. Chances are there is a constraint on the PCB space and forces the use of a smaller case size. The capacitor value selected must depend on the sampling capacitor (Csamp = 30pF) of the MAX11905, which is used to hold the charge of the input voltage.

Q = CSAMPVREF × 2 (Eq. 1)

Q = (30pF)(6V) = 180pC

1 LSB is 2.86µV when VREF is 3V.

Q = CINVLSB

180pC = C(2.86µV)

Equation 01a.

63µF is a large capacitance load for the operational amplifier (op amp) to drive. Using 5% of the op amp to drive the charge is given by the equation below:

Q = CQIN(0.05)(VREF)

180pC = CIN(0.05)(3V)

Equation 01b.

Keep in mind that the MAX11905 has fully differential inputs, which means we need to divide the capacitance half for the 1200pF to be seen at the inputs.

The resistor also needs careful consideration, selecting one with very good tolerance and temperature coefficient. When designing for the MAX11905, 0.1% and 10ppm resistors are used at the ADC analog inputs. The time constant of the lowpass filter is set as:

TIN = RINCIN (Eq. 2)

The minimum acquisition time of the MAX11905 is:

TACQ(MIN) ≥ kTIN (Eq. 3)

where k is the constant multiplier for 20 bits. k = 15.

100ns ≥ 15(tin)

tin ≥ 6.67ns

Equation 03.

The resistor can round down to a more obtainable value like 10Ω. Below is the frequency for the zero.

Equation 04a. (Eq. 4)

Equation 04b.

The 26.5MHz is very high because the MAX11905 maximum bandwidth is 20MHz. The passive components selected are a good starting point but adjustments are needed before designing into the circuit. We will make one component change at a time to determine if we are moving in the right direction. To simplify the trial stage, we tested between 1200pF and 4000pF single-ended (or 600pF to 2000pF differential) and notice results improve up until 4000pF. Therefore, we made CIN equal to 4000pF.

Equation 04c.

Keep in mind that the MAX11905 has fully differential inputs which means we need to divide the capacitance in half. We will call this capacitor CIN(PCB).

CIN(PCB) = 2000pF

Operational Amplifier

When selecting an operational amplifier (op amp), consider the following specification: gain bandwidth, THD, and low noise.

The op amp selected is the MAX9632 (Figure 2) using a ±15V supply. The op amp specifications of interest are below:

Gain bandwidth (fUNITY) = 55MHz, cover the MAX11905 full bandwidth
THD = 128dB, provides better THD than the MAX11905
Input noise density = 0.94nV/√Hz, ensures overall SNR is not degraded.

Op amp and lowpass filter at the input of the MAX11905. Figure 2. Op amp and lowpass filter at the input of the MAX11905.

With the R-C components selected, we can calculate the pole and decide if the lowpass filter is adequate for our design.

Equation 05a. (Eq. 5)

where RO is the output impedance of the MAX9632.

Equation 05b.

The equations below will calculate the gain at the pole, APOLE, and zero, AZERO.

Equation 06a. (Eq. 6)

Equation 06b.

Equation 07a. (Eq. 7)

Equation 07b.

The closed-loop frequency is given by:

Equation 08a. (Eq. 8)

Equation 08b.

The first stage of op amps provides differential inputs in inverting configuration. The 2kΩ network (see Figure 3) creates a gain of -1V/V and with an input common-mode voltage of 1.5V. The second stage of op amps provides additional buffering. As always, choose 0.1% and 10ppm resistors along the analog input path. Between the two stages lies another lowpass filter at 18.5kHz using a similar equation like Equation 4. The capacitors in this filter have voltage ratings above 250V and are the C0G/NP0 type.

Analog front-end of the MAX11905 EV kit. Figure 3. Analog front-end of the MAX11905 EV kit.

Differential Op Amp

The differential op amp that was selected is the MAX44205 using a ±5V supply. This differential op amp was made specifically for high-resolution ADCs like the MAX11905. Figure 4 shows the analog front-end schematic of the MAX11905 Differential EV kit. The key specification to consider in the MAX44205 is the same like all op amps.

Gain bandwidth = 400MHz
THD = 130dB
Input noise density = 3.1nV/√Hz

The lowpass filter used in the MAX11905 EV kit with the MAX9632 design is a good starting point for our design. Why? The differential amplifier has very low output impedance and does not need the same attention as the MAX9632 in frequency response. It is more stable! More focus is on the gain setting and the lowpass filter of the feedback, which is used to filter any harmonics of the input signal. Normally, the gain would be 1V/V but since the lowpass filter is taken into consideration, the gain is set to 0.5V/V. When designing for the MAX11905, 0.1% and 10ppm resistors are used at the analog input path. Matching the resistors and symmetric traces is very critical, especially in the differential op amp and ADC designs.

Equation 08c.
(Eq. 8)

Equation 08d.

This falls within range when we use a 10kHz sine wave.

Analog front-end of the MAX11905 Differential EV kit. Figure 4. Analog front-end of the MAX11905 Differential EV kit.

Results

The MAX11905 EV kit with the MAX9632 provides low offset and noise for DC input. Figure 5 displays the histogram and to the right is the data where both MAX11905 analog inputs are connected to ground. The standard deviation is 4.73 LSB and the peak-to-peak noise is 42 LSB.

Histogram from the MAX11905 EV kit. Figure 5. Histogram from the MAX11905 EV kit.

The MAX11905 Differential EV kit with the MAX44205 provides low SFDR and low noise for AC input. The input signal that goes into the MAX44205 is a near full-scale, 10.208kHz sine wave that is converted by the MAX11905. Figure 6 is the FFT graph when the MAX11905 is coherent sampling at 1.5Msps. The data on the right shows the SFDR is 118.2dB, THD is -114.9dB, SNR and SINAD are both 97.4dB.

FFT from the MAX11905 differential EV kit. Figure 6. FFT from the MAX11905 differential EV kit.

Conclusion

The results shown from both evaluation kits will make designing the analog front-end a more simple task. The user only needs to select one from the MAX11905 EV kit or the MAX11905 Differential EV kit. Depending if the design calls for low offset and low noise for DC input in the MAX11905EVKIT#, or low SFDR and low noise for AC input in the MAX11905DIFEVKIT#.

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