system manager uses digital pulse-width modulation (PWM) outputs to margin power supplies. PWM margining is performed in a closed loop where the device measures the resulting power-supply output voltage each time it adjusts the PWM duty cycle. The PWM outputs from the MAX34451 operate at 312.5kHz with 8 bits of resolution.
This application note outlines the performance of PWM margining when the MAX34451 is connected to the MAX15041 evaluation (EV) kit, as shown in Figure 1. Several key tests were performed; the results are reported.
Component Selection and Changes
output voltage was changed from the default of 3.3V to 1.8V by changing the R5 resistor on the MAX15041 EV kit from 45.3kΩ to 19.6kΩ.
When using the MAX34451 to margin power supplies with the PWM outputs, the series resistor after the PWM ripple filter (R72 in Figure 1) must be sized correctly to allow the proper margining range. How to select the proper resistor value is detailed in the MAX34451 data sheet
, as well as in Equation 1 below.
|PWM “R” = (VFB - 0.3)/(IFB × margining range × 120%)
Where VFB is the feedback node voltage and IFB is the feedback node current.
In this application note, Equation 1 is calculated as:
|PWM “R” Value = (0.606 - 0.3)/(60.8µA × 5% × 120%) = 84kΩ
Where VFB is 0.606V (i.e., the feedback voltage for the MAX15041), IFB = 1.8V/(10kΩ + 19.6kΩ) = 60.8µA, and the margining range is ±5%.
For more details on the PWM margining operation, see the MAX34451 data sheet
Figure 1. PWM margining test configuration.
VOUT Noise with PWM Margining
One of the major concerns with using PWM margining is the effect that PWM digital pulses have on the resulting power-supply output-voltage noise. The PWM lowpass filter (4.7kΩ and 10nF) used in these tests is about 14 time constants of the 312.5kHz PWM frequency. Figure 2 shows the power-supply output-voltage noise ripple with no margining applied and when the power supply was margined high and low by 5%. A 50mV scale was used to zoom in on any resulting ripple. As shown, the large time constant provided by the PWM lowpass filter and the large decoupling provided by the 84kΩ series resistor result in very little additional noise being added to the power-supply output voltage.
Figure 2. VOUT noise with and without PWM margining applied.
VOUT Response When PWM Margining Is Enabled and Disabled
When the PWM output is enabled, it transitions from high impedance to a fixed duty cycle, which is programmable. In Figure 3
, the initial duty cycle was set to 2Fh or 47 decimal. This value was chosen because the feedback voltage of the MAX15041 is 0.606V and the supply voltage to the MAX34451 was 3.3V (0.606V/3.3V = 0.1836 × 256 = 2Fh). More details can be found in the MAX34451 data sheet
Figure 3. VOUT response when PWM margining is enabled.
When the PWM signal is enabled, the PWM ripple filter voltage is close to the nominal feedback voltage on the MAX15041, which is 0.606V. As the PWM duty cycle decreases from the initial value, the ripple voltage is decreased, which pulls current from the feedback node on the MAX15041. Pulling current from the feedback node causes the power-supply output voltage to increase. The MAX34451 continues adjusting the PWM duty cycle while constantly monitoring the power-supply output voltage (VOUT) to obtain the required margining level.
Figure 4 shows the result on VOUT when margining is disabled from both a margin high state and a margin low state.
Figure 4. VOUT response when PWM margining is disabled.
Effect of the PWM Lowpass Filter on the VOUT Power-On Response
The required PWM lowpass filter can affect power supply designs with fast (< 1ms) output voltage ramps. Figure 5 shows the resulting power-supply output-voltage (VOUT) overshoot with a fast ramp. In this application note, C7 on the MAX15041 EV kit was set to 10nF. When the power-supply output-voltage ramp is slowed by changing C7 to 33nF, the overshoot is eliminated.
Figure 5. VOUT response during turn-on with PWM filter installed.
The PWM power-supply voltage-margining operation of the MAX34451 system manager is effective and simple to implement. Only the value of a single resistor needs to be determined to implement the hardware design. The PWM signal has very little impact on the integrity of the power-supply output voltage. However, fast power-supply ramps can exhibit overshoot.