アプリケーションノート 5266

Quick Reference Guide for Programming the DS1877 SFP Controller

筆者: Hrishikesh Shinde

要約: The DS1877 SFP controller allows various programming options to configure the alarms, warnings, lookup tables (LUTs), and other functions. This customization necessitates a large register memory map. This application note provides an alternate view of the register map, which is a helpful resource when programming the device.

Memory Map of the DS1877

The Main Device located at A2h is used for overall device configuration and transmitter 1 control, calibration, alarms, warnings, and monitoring. The transmitter 2 is controlled by the device located at address B2h.
  • Lower Memory, A2h is addressed from 00h to 7Fh and contains alarm and warning thresholds, flags, masks, several control registers, password entry area (PWE), and the Table Select byte.
  • Table 01h, A2h primarily contains user EEPROM (with PW1 level access), as well as alarm and warning enable bytes.
  • Table 02h, A2h/B2h is a multifunction space that contains configuration registers, scaling and offset values, passwords, interrupt registers as well as other miscellaneous control bytes. All functions and status can be written and read from either A2h or B2h addresses.
  • Table 04h, A2h contains a temperature indexed LUT for control of the MOD1 voltage. The MOD1 LUT can be programmed in 2°C increments over the 40°C to +102°C range.
  • Table 05h, A2h is empty by default. It can be configured to contain the alarm and warning enable bytes from Table 01h, Registers F8h-FFh with the MASK bit enabled (Table 02h, Register 89h). In this case, Table 01h will be empty.
  • Table 06h, A2h contains a temperature indexed LUT for control of the APC1 voltage. The APC1 LUT can be programmed in 2°C increments over the 40°C to +102°C range.
The Main Device located at B2h is used for transmitter 2 control, calibration, alarms, warnings, and monitoring.
  • Lower Memory, B2h is addressed from 00h to 7Fh and contains alarm and warning thresholds, flags, masks, several control registers, password entry area (PWE), and the Table Select byte.
  • Table 01h, B2h contains alarm and warning enable bytes.
  • Table 04h, B2h contains a temperature indexed LUT for control of the MOD2 voltage. The MOD2 LUT can be programmed in 2°C increments over the 40°C to +102°C range.
  • Table 05h, B2h is empty by default. It can be configured to contain the alarm and warning enable bytes from Table 01h, Registers F8h-FFh with the MASK bit enabled (Table 02h, Register 89h). In this case Table 01h will be empty.
  • Table 06h, B2h contains a temperature indexed LUT for control of the APC2 voltage. The APC2 LUT can be programmed in 2°C increments over the 40°C to +102°C range.
  • Auxiliary memory (Device A0h) contains 256 bytes of EE memory accessible from address 00h–FFh. It is selected with the device address of A0h.
Refer to the tables below for a more complete detail of each byte’s function, as well as for read/write permissions for each byte.

Shadowed EEPROM

Many nonvolatile (NV) memory locations (listed within the Register Reference section) are actually Shadowed EEPROM and are controlled by the SEEB bit in Table 02h, Register 80h.
The DS1877 incorporates Shadowed EEPROM memory locations for key memory addresses that may be written many times. By default, the Shadowed EEPROM Bit, SEEB, is not set and these locations act as ordinary EEPROM. By setting SEEB, these locations function like SRAM cells, which allow an infinite number of write cycles without concern of wearing out the EEPROM. This also eliminates the requirement for the EEPROM write time, tWR. Because changes made with SEEB enabled do not affect the EEPROM, these changes are not retained through power cycles. The power-on value is the last value written with SEEB disabled. This function can be used to limit the number of EEPROM writes during calibration or to change the monitor thresholds periodically during normal operation helping to reduce the number of times EEPROM is written. The memory map description indicates which locations are shadowed EEPROM.

DS1877 Memory Map

DS1877 Memory Map

Register Reference

The following tables provide an easy reference to the Lower Memory, and Tables 00h, 01h and 02h. For description of the functionality for each bit, please refer to the corresponding register in the datasheet. Table 04h through 08h are Look-up tables that do not require a separate reference and hence are not included here. Please refer to the datasheet for detailed information about these tables.
The guide uses a color notation to distinguish between registers that can be accessed by the A2h and B2h memory. The notation is as follows:
Memory Location is common to the A2h and B2h memory.
Memory Location is different for the A2h and B2h memory.
Register contains bits, some of which can be accessed only by the A2h memory, and some which can be accessed only by the B2h memory.
Note: RSVD is used as an acronym for reserved.

Lower Memory

Register Name Register Addr (h) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
TEMP ALARM HI
TEMP WARN HI
00, 04 S 26 25 24 23 22 21 20
01, 05 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8
TEMP ALARM LO
TEMP WARN LO
02, 06 S 26 25 24 23 22 21 20
03, 07 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8
VCC ALARM HI
VCC WARN HI
08, 0C 215 214 213 212 211 210 29 28
09, 0D 27 26 25 24 23 22 21 20
VCC ALARM LO
VCC WARN LO
0A, 0E 215 214 213 212 211 210 29 28
0B, 0F 27 26 25 24 23 22 21 20
EE 10-1F EE EE EE EE EE EE EE EE
RSSI ALARM HI
RSSI WARN HI
20, 24 215 214 213 212 211 210 29 28
21, 25 27 26 25 24 23 22 21 20
RSSI ALARM LO
SSI WARN LO
22–26 215 214 213 212 211 210 29 28
23–27 27 26 25 24 23 22 21 20
PW2 EE 28–37 EE EE EE EE EE EE EE EE
PW2 EE 38–4F EE EE EE EE EE EE EE EE
PW2 EE 50–5F EE EE EE EE EE EE EE EE
TEMP VALUE 60 S 26 25 24 23 22 21 20
61 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8
VCC VALUE 62 215 214 213 212 211 210 29 28
63 27 26 25 24 23 22 21 20
RESERVED 64–67 0 0 0 0 0 0 0 0
RSSI VALUE 68 215 214 213 212 211 210 29 28
69 27 26 25 24 23 22 21 20
RESERVED 6A–6D 0 0 0 0 0 0 0 0
STATUS 6E <5/D>RSVD <5/D>TXDC <2/C>INXS <2/C>RSELS <5/C>RSELC <2/C>FLTS <2/D>RXL <2/C>RDYB
UPDATE 6F TEMP RDY VCC RDY RSVD RSVD RSSI RDY RSVD RSVD RSSIR
ALARM3 70 TEMP HI TEMP LO VCC HI VCC LO RSVD RSVD RSVD RSVD
ALARM2 71 RSSI HI RSSI LO RSVD RSVD RSVD RSVD RSVD FLTINT
RESERVED 72 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
ALARM0 73 LOS HI LOS LO RSVD RSVD RSVD RSVD RSVD RSVD
WARN3 74 TEMP HI TEMP LO VCC HI VCC LO RSVD RSVD RSVD RSVD
RESERVED 75–7A RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
PASSWORD ENTRY 7B 231 230 229 228 227 226 225 224
7C 223 222 221 220 219 218 217 216
7D 215 214 213 212 211 210 29 28
7E 27 26 25 24 23 22 21 20
TABLE SELECT 7F 27 26 25 24 23 22 21 20

Table 01h

Register Name Register Addr (h) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
EEPROM 80h–F7 EE EE EE EE EE EE EE EE
ALARM EN3 F8 TEMP HI TEMP LO VCC HI VCC LO RSVD RSVD RSVD RSVD
ALARM EN2 F9 RSSI HI RSSI LO RSVD RSVD RSVD RSVD RSVD FLTINT
RESERVED FA RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
ALARM EN0 FB LOS HI LOS LO RSVD RSVD RSVD RSVD RSVD RSVD
WARN EN3 FC TEMP HI TEMP LO VCC HI VCC LO RSVD RSVD RSVD RSVD
RESERVED FD–FF RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

Table 02h

Register Name Register Addr (h) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
MODE 80H SEEB DAC2 EN RSVD RSVD AEN DAC1 EN RSVD RSVD
T INDEX 81h 27 26 25 24 23 22 21 20
RESERVED 82–85 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
DEVICE ID 86 0 1 1 1 0 1 1 1
DEVICE VER 87 DEVICE VERSION
CNFGA 88 RSVD RSVD RSVD ASEL MASK INVRSOUT RSVD INVLOSOUT
CNFGB 89 INXC INVOUTX ALATCH2 QTLATCH2 WLATCH2 ALATCH1 QTLATCH1 WLATCH1
CNFGC 8A RSVD TXD_RST EN DAC2 LOSC2 INVLOS2 RSVD TXD_RST EN DAC1 LOSC1 INVLOS1
DEVICE ADDR 8B 27 26 25 24 23 22 21 20
RESERVED 8C RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
FORCE RSSI 8D RSVD XOVEREN2 RSSI2_FC RSSI2_FF RSVD XOVEREN1 RSSI1_FC RSSI1_FF
RIGHT SHIFT2 8E RSVD RSSI2C2 RSSI2C1 RSSI2C0 RSVD RSSI2F2 RSSI2F1 RSSI2F0
RIGHT SHIFT1 8F RSVD RSSI1C2 RSSI1C1 RSSI1C0 RSVD RSSI1F2 RSSI1F1 RSSI1F0
RESERVED 90–91 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
VCC SCALE
XOVER2 COARSE
XOVER2 FINE
RSSI2 COARSE
RSSI2 FINE
RSSI1 COARSE
RSSI1 FINE
92, 94. 96, 98, 9A, 9C, 9E 215 214 213 212 211 210 29 28
93,95, 97, 99, 9B, 9D, 9F 27 26 25 24 23 22 21 20
INTERNAL TEMP OFFSET A0 S 28 27 26 25 24 23 22
A1 21 20 2-1 2-2 2-3 2-4 2-5 2-6
VCC OFFSET
XOVER1 COARSE
XOVER1 FINE
RSSI2 COARSE
RSSI2 FINE
RSSI1 COARSE
RSSI1 FINE
A2, A4, A6, A8, AA, AC, AE S S 215 214 213 212 211 210
A3, A5, A7, A9, AB, AD, AF 229 228 227 226 225 24 223 222
PW1 B0 231 230 229 228 227 226 225 224
B1 223 222 221 220 219 218 217 216
B2 215 214 213 212 211 210 29 28
B3 27 26 25 24 23 22 21 20
PW2 B4 231 230 229 228 227 226 225 224
B5 223 222 221 220 219 218 217 216
B6 215 214 213 212 211 210 29 28
B7 27 26 25 24 23 22 21 20
LOS RANGING2 B8 RSVD HLOS22 HLOS21 HLOS20 RSVD LLOS22 LLOS21 LLOS20
RESERVED B9 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
HLOS2 BA 27 26 25 24 23 22 21 20
LLOS2 BB 27 26 25 24 23 22 21 20
LOS RANGING1 BC RSVD HLOS12 HLOS11 HLOS10 RSVD LLOS12 LLOS11 LLOS10
RESERVED BD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
HLOS1 BE 27 26 25 24 23 22 21 20
LLOS1 BF 27 26 25 24 23 22 21 20
PW_ENA C0 RSVD RWTBL1C RWTBL2 RWTBL1A RWTBL1B WLOWER WAUXA WAUXB
PW_ENB C1 RWTBL46 RTBL1C RTBL2 RTBL1A RTBL1B WPW1 WAUXAU WAUXBU
RESERVED C2h–C5 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
POLARITY C6 RSVD RSVD RSVD RSVD DAC2P RSVD DAC1P RSVD
TBLSELPON C7 27 26 25 24 23 22 21 20
DAC2 VALUE C8 0 0 0 0 0 0 29 28
C9 27 26 25 24 23 22 21 20
RESERVED CA–CB RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
DAC1 VALUE CC 0 0 0 0 0 0 29 28
CD 27 26 25 24 23 22 21 20
RESERVED CE–CF RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
EMPTY D0–FF
EMPTY