アプリケーションノート 4931

IEEE 1451.4 Class 1 MMI Smart Transducer Digital Driver Circuit


要約: The IEEE® 1451.4 mixed-mode interface (MMI) is the connection for both analog signals and digital transducer electronic data sheets (TEDS) between a transducer and a network-capable application processor (NCAP) or data acquisition system (DAS). The IEEE 1451.4 standard defines two classes of MMI. In Class 1, the TEDS shares one wire with the analog function, using negative voltage for communication. Class 2 provides the TEDS with its own pair of wires and uses positive voltage for communication. Consequently, Class 2 is directly compatible to 1-Wire® drivers (masters). Due to the negative communication voltage, Class 1 requires a more complex driver circuit. This document explains how to build an IEEE 1451.4 Class 1 MMI to access the TEDS.

A similar version of this article appeared in two installments, April 1, 2011 and April 6, 2011 on the EE Times website.

Introduction

Originally, there was no digital communication interface standard for mixed-mode transducers and network-capable application processors (NCAPs). Each transducer manufacturer defined its own interface. Consequently, transducer manufacturers could not support all of the control networks for which their products might be suitable. To solve the problem, the Technical Committee on Sensor Technology of the IEEE Instrument and Measurement Society started an initiative to create a Standard for a Smart Transducer Interface for Sensors and Actuators, Mixed-Mode Communication Protocols and Transducer Electronic Data Sheet (TEDS) Formats. The result of the initiative is IEEE 1451.4-2004, which is recognized as an American National Standard (ANSI).

Some of the main objectives of this standard are:
  • Enabling plug-and-play at the transducer level. This is accomplished by providing a common transducer communication interface.
  • Enabling and simplifying the creation of smart transducers.
  • Simplifying the setup and maintenance of instrumentation systems.
  • Enabling implementation of smart transducers with minimal use of memory.
The standard describes the following elements:
  • The transducer, containing a mixed-mode interface (MMI) and a transducer electronic data sheet (TEDS).
  • The MMI, used to access the TEDS.
  • The TEDS, implemented as a memory chip that resides inside the transducer.
  • A template, describing the data structure of a TEDS.
  • A template description language (TDL).
  • A software object called transducer block, which is used to access, decode, and encode the TEDS using the TDL.
An IEEE 1451.4-compliant transducer provides a self-describing capability through the TEDS. This application note discusses the digital driver circuit on the NCAP (data acquisition system) to access the TEDS.

IEEE 1451.4 Mixed-Mode Interfaces (MMIs)

The IEEE 1451.4 MMI is the connection for both the analog signals and the digital TEDS data between a transducer and an NCAP or data acquisition system (DAS). The IEEE 1451.4 standard defines two classes of MMI. In Class 1, the TEDS shares one wire with the analog function and uses negative voltage for communication. Class 2 provides the TEDS with its own pair of wires and uses positive voltage for communication. Consequently, Class 2 is directly compatible to Maxim's 1-Wire drivers (masters), as described in application note 4206, "Choosing the Right 1-Wire® Master for Embedded Applications." Because of the negative communication voltage, Class 1 requires a more complex driver circuit.

Within Class 1, there are three variants of the MMI, using two, three, or four wires to communicate with the transducer or the TEDS. The common characteristic among these interfaces is that one wire is shared between the analog and digital function. The shared wire could be signal, power, or return.

Figure 1 illustrates a typical 2-line constant-current powered sensor with a shared signal wire. By reversing the polarity on the signal line, the diodes allow sequential access to either the amplifier or the TEDS memory. When the control switch is in the "analog" position, the positive current source inside the DAS supplies power to the amplifier through the signal line and the upper diode. The transducer output exists as analog voltage on the signal line. When the control switch is in the "digital" position, the memory device is powered by the negative logic supply through the lower diode. The circuit shows a pulldown resistor (Rt) across the terminals of the TEDS memory chip. This resistor discharges the capacitance of the memory circuit and wiring, ensuring that the logic 0 voltage is met within the proper timing.

Figure 1. IEEE 1451.4 Class 1 MMI, shared signal wire.
Figure 1. IEEE 1451.4 Class 1 MMI, shared signal wire.

Figure 2 shows the block diagram of a 3-line voltage-powered sensor with a shared power line. The signal line is dedicated solely to transferring the transducer's analog output voltage to the DAS. By reversing the polarity on the supply line, the diodes allow sequential access to either the amplifier or the TEDS memory. When the control switch is in the "analog" position, the positive supply from the DAS supplies power to the amplifier through the upper diode. When the control switch is in the "digital" position, the memory device is powered by the negative logic supply through the lower diode.

Figure 2. IEEE 1451.4 Class 1 MMI, shared power wire.
Figure 2. IEEE 1451.4 Class 1 MMI, shared power wire.

Figure 3 adds another wire, thus creating a 4-line voltage-powered sensor with a shared return wire, typically a ground connection, or shield. The sensor and the TEDS memory have their independent power supply and could theoretically work simultaneously. The switch to select analog and digital mode still exists; its purpose is to disable the digital function when the sensor is used. This minimizes the noise otherwise caused by mutual interference between analog signal and digital TEDS data due to the voltage drop on the shared return. The diode and Rt are actually not needed for this configuration. The resistor can be omitted and the diode replaced by a short.

Figure 3. IEEE 1451.4 Class 1 MMI, shared return wire.
Figure 3. IEEE 1451.4 Class 1 MMI, shared return wire.

The TEDS Memory

The typical memory chip used as TEDS is a DS2430A 256-bit 1-Wire EEPROM. Since the chip has no VCC pin (i.e., it is parasitically powered), it only has two pins, IO and GND. Block diagrams in the IEEE standard section 8.1.2 do not reference these pins by their names. Instead, they use "+" for IO and "-" for GND. Figure 4 shows the digital section of an IEEE 1451.4-compliant sensor with actual part numbers and pin names. The standard (section 8.5, Family Code) does not specify a particular family code for the TEDS memory. Therefore, 2-pin 1-Wire memory chips other than the DS2430A are permissible. The general-purpose diode 1N4148 could be replaced by a Schottky diode, which has a forward voltage of approximately 0.3V. The Rt resistor value is not critical. The circuit was tested with 100kΩ.

Figure 4. Class 1 sensor, TEDS implementation details.
Figure 4. Class 1 sensor, TEDS implementation details.

Constructing a Class 1 MMI Digital Driver Circuit

1-Wire devices operate with signal levels of 3V to 5V when idle (pullup voltage) and 0V when active. This voltage is measured between the terminals IO (positive) and GND (negative), as seen by the chip. The Class 1 MMI connects the IO pin to 0V and modulates the negative voltage at the GND pin of the memory chip (Figure 5). Compared to normal 1-Wire signal levels, the MMI signal is inverted and shifted to the negative side by 5V.

Figure 5. Signal levels normal 1-Wire vs. Class 1 MMI.
Figure 5. Signal levels normal 1-Wire vs. Class 1 MMI.

The memory chip cannot tell, nor does it care, how the voltage is generated across its terminals. When responding, it simply applies a short circuit between its terminals for a defined duration. In the "normal case," this short is observed as ~0V on IO. In case of a Class 1 MMI, the short raises the voltage at the digital communication line from -5V (idle) to -VF of the diode (-0.7V).

MMI Driver Description

Figure 6 shows the circuit of a MMI driver. The circuit consists of a forward path (top, master to sensor, write) and a return path (bottom, sensor to master, read). The IEEE 1451.4-compliant sensor is connected through the analog/digital switch to TP4. The return line is connected to 0V (GND) of the driver. The signal levels at TP2 and TP6 correspond to normal 1-Wire levels (idle 5V, active 0V). V+ corresponds to the operating voltage of the microcontroller and could be in the range of 3V to 5V. TP2 is to be connected to the open-drain output (write) port of the microcontroller; TP6 connects to an input port.

Figure 6. Class 1 MMI digital driver with sensor attached.
Figure 6. Class 1 MMI digital driver with sensor attached.

Connecting a Bidirectional 1-Wire Master

Connecting a bidirectional master requires the additional circuit shown in Figure 7. Since the propagation of rising and falling edges in the level conversion section is not equal, the MMI driver with bidirectional 1-Wire master becomes unstable when the positive operating voltage is too high. For this reason, the positive supply needs to be limited to approximately 3.3V. The bidirectional master, therefore, must be a 3V type, such as the DS2482. Using a 5V bidirectional master (e.g., DS2480B) causes the voltage at the COM and NO pin of the analog switch to exceed the V+ level, which violates the permissible operating conditions.

Figure 7. Add-on circuit to interface to a bidirectional 1-Wire master.
Figure 7. Add-on circuit to interface to a bidirectional 1-Wire master.

Verification

The circuit of Figure 6 was tested with the add-on of Figure 7. The 1-Wire master was a DS9097U-S09, which is based on the DS2480B driver chip. To ensure stability, the positive supply (V+) was set to 3.4V. The 1-Wire master operated at 5V, violating the MAX4561 analog switch's requirement that no voltage be higher than the supply voltage. This explains the artifacts on the TP2 signal, but has otherwise no adverse effect on the function of the circuit.

Reset/Presence Detect Cycle

Figure 8 shows the signal at TP2 (top trace), TP4 (center trace), and TP6 (bottom trace). Because of the diode in the sensor, the 0V level is not fully reached when the slave asserts its presence pulse. The bottom trace shows a clean presence pulse. The positive amplitude at TP6 corresponds to the 3.4V for V+.

Figure 8. Reset/PD sequence.
Figure 8. Reset/PD sequence.

Read Time Slots

Figure 9 shows the same nodes as before (TP2 = top trace, TP4 = center trace, and TP6 = bottom trace). The first slot reads a 1, the second slot reads a 0.

Figure 9. Communication time slots.
Figure 9. Communication time slots.

Conclusion

The circuit presented here works well for a microcontroller as 1-Wire master using separate ports for read and write. The part of the application software that generates the time slots and the reset-/presence-detect cycle, however, has strict timing requirements which may necessitate that it be written in assembly language. The add-on circuit for bidirectional 1-Wire driver chips allows application software development using a high-level language.

Due to its asynchronous operation, the add-on circuit causes a glitch when the master stops pulling the 1-Wire line low. When reading a zero, the glitch can trigger the active pullup of the driver, thereby causing a conflict between the driver's pullup and the MAX4561's pulldown. Therefore, when used with a DS2482 driver, the active pullup should be switched off. The glitch is also the reason why the add-on circuit for bidirectional 1-Wire driver does not tolerate 1-Wire slaves at the master's side.