A similar version of this article appeared in the December 20, 2006 issue of Portable Design
The increasingly stringent supply-voltage specifications for FPGAs and microcontrollers have emphasized the need to tweak output levels and provide voltage margins as specified. That adjustment can be performed with a mechanical trim potentiometer during PCB assembly, or you can implement an inexpensive circuit (Figure 1
) that enables adjustment both at assembly and subsequently as required, over the life of the product.
Figure 1. By introducing a solid-state potentiometer (IC1) and buffer amplifier as shown, you can digitally control the power supply's output voltage via a serial data link.
The nonvolatile solid-state potentiometer (IC1, MAX5481
) has 1024 tap positions and can be configured as a variable voltage divider. It was chosen for its high resolution (1024 steps) and low ratiometric temperature coefficient (5ppm/°C), which ensures that the divider will provide good accuracy over temperature.
In a typical switching power supply, two resistors provide the voltage feedback necessary to set and maintain the output-voltage level. You can achieve a direct output-voltage adjustment by simply replacing those resistors with the variable-divider IC, but the IC's initial wiper setting must be programmed at least once, after the initial power up. To avoid an accidental over-voltage, you should therefore avoid this method.
Another option is to control the feedback by substituting a potentiometer IC for one of the feedback resistors, but that approach introduces gross inaccuracy. The IC is designed for precise ratiometric performance, but its end-to-end resistance tempco is about seven times greater than the ratiometric value, and its resistance value from unit to unit can vary as much as ±25%.
To obtain the precision and temperature stability available in the Figure 1 circuit, first select a switching power supply with an external reference connection. (Biasing the pot with the reference voltage allows the adjustment circuit to track variations in temperature and line voltage.) Be sure to verify that the reference can handle the nominal 50kΩ of additional load represented by the potentiometer resistance.
To create an adjustable lower reference (VADJ
) for the feedback resistors, the potentiometer wiper is buffered with a relatively wide bandwidth, rail-to-rail op amp. Use the following equation to calculate VOUT
for the power supply:
|VOUT = VFB + R2/R1 × (VFB - VADJ)
= 1.25V (for the power supply shown), R1 = 10.0kΩ, and VOUT
= 5.0V. To obtain the full adjustment range, calculate R2 with the wiper at mid-scale and VADJ
= 0.625V. Rearrange Equation 1 and solve for R2:
R2 = R1 × (VOUT - VFB)/(VFB - VADJ) = 60.0kΩ. (60.4kΩ is a standard 1% value.)
To calculate the VOUT
range and resolution of adjustment, set the wiper at its minimum position (VADJ
= 0V). From Equation 1, the corresponding maximum VOUT
is 8.75V. Then, set the wiper at the maximum position, where VADJ
= 1.25V. Thus, the adjustment resolution for VOUT
is (8.75V - 1.25V)/1024 steps = 7.32mV per step. (Note that the R2 value lets you raise or lower the voltage-adjustment range.)
This circuit allows precise adjustment of a power-supply voltage during operation, while avoiding the design limitations of silicon potentiometers. The IC potentiometer's low drift and good resolution of adjustment makes the circuit suitable for controlling the low core voltages of FPGAs and microcontrollers.