The DS4303 (Figure 1
) is a track-and-infinite-hold circuit that accepts an analog input voltage and reproduces that voltage on its output using a 12-bit digital-to-analog converter (DAC). Once it has replicated the input voltage on its output, it saves the output code to EEPROM to produce a nonvolatile analog reference voltage. The output voltage is generated using an internal low-temperature-coefficient reference, and is buffered with a rail-to-rail operational amplifier.
Figure 1. DS4303 functional diagram.
DS4303 LDMOS Biasing Circuit
The circuit in Figure 2
can be used to temperature compensate the gate voltage of an LDMOS. The output voltage of this circuit is equal to twice the DS4303's VOUT
plus the PNP's VBE
. The doubled DS4303 voltage is a low-temperature- coefficient voltage source. The PNP's VBE
will change approximately +2mV/°C, providing temperature compensation for the LDMOS. This circuit can provide good temperature compensation for the LDMOS, assuming that the PNP is thermally coupled to the LDMOS.
To calibrate this circuit, place the expected DS4303 output voltage on the VIN
pin, and pull the Adjust signal low to trigger the DS4303 to update its output voltage. Once the DS4303 completes its update, measure the quiescent current using the current sense amplifier, and iterate until the proper bias is reached. The input to the DS4303 should be held static while it is converging to ensure it reaches the proper value.
Figure 2. DS4303 LDMOS RF power-amp bias circuit.
Comparing the DS4303 Circuit to the DS1870 Solution
The primary advantages of the DS4303 analog solution are its simplicity and cost. If this circuit is placed close to the LDMOS, then the PNP's thermal coupling to the LDMOS causes the gate voltage to increase by the correct amount with temperature. This solution is also very easy to program compared to lookup tables, because you are programming the biasing point for a single temperature. Because this solution is completely analog after its initial programming, there are no output transients caused by lookup-table updates once the system is calibrated.
The DS1870 solution allows a very flexible calibration process that can be tailored to the application. It has the ability to bias the LDMOS gate for both temperature and drain voltage. These biases can be nonlinear or any linear gain that is required for compensation. For temperature compensation, the ability to implement differing gain functions allows the DS1870 to effectively compensate even when its location relative to the LDMOS does not provide excellent thermal coupling. Unlike other mixed-signal LDMOS biasing circuits, the DS1870 can be factory programmed to operate as a stand-alone biasing solution. Its five ADC channels can be accessed using an I²C™-compatible serial bus to monitor the system during operation, and alarms thresholds can be set for any monitored parameter to drive the interrupt input of a processor or shut down the amplifier. More information on the DS1870
can be downloaded from the Maxim website.