アプリケーションノート 1901

Convert a CPU Core Supply from Latchoff Mode to Hiccup Mode During a Short Circuit


要約: This design note shows how to convert a CPU core supply from latchoff mode to hiccup mode during a short circuit. Adding two inexpensive voltage comparators to core controllers can enable hiccup mode and restart the output after a short circuit. The MAX1937/MX1938/MAX1939 CPU core controllers are featured.

To prevent excessive power dissipation during output short circuit, the MAX1937/MAX1938/MAX1939 provide a latch off feature under either short circuit or under-voltage-lockout condition. Once the output is latched off either the input or the EN pin has to be cycled to re-start the output again. However, in some applications the automatic recovering feature offered by hiccup mode is preferred. With two cheap voltage comparators such a feature can be easily implemented with the MAX1937/MAX1938/MAX1939.

Figure 1 shows the schematics of the MAX1937 with the hiccup mode feature.

Figure 1. The MAX1937 dual phase 60A output current CPU core supply with hiccup mode.
Figure 1. The MAX1937 dual phase 60A output current CPU core supply with hiccup mode.

The basic idea is to generate a signal that can periodically cycle the EN pin to re-start the MAX1937 once it is latched off due to output short circuit condition. Such cyclic signal on the EN pin will continue until the output fault condition is cleared. The power dissipation in the core supply during short circuit condition is proportional to the frequency of trying to re-start the MAX1937 controller. Therefore, slowing down the re-starting frequency will greatly reduce the power dissipation.

In Figure 1, the MAX4477 with the external components provide the hiccup feature. There are two comparators inside the MAX4477: comparator A and comparator B. Comparator B is used to monitoring the output voltage and comparator A is used to generate the re-trying signal. The operation of the hiccup circuit is described as follows: If the output voltage is above one-tenth of the normal output voltage OUTB is low and OUTA is high. No action is taken. Once the output voltage is less than the threshold, the OUTB goes high, pulling OUTA low. R24, R30 and C43 set the delay time from the output voltage goes low to pulling EN voltage low. Once the OUTA is low, R30 is pulled to ground through D3 to discharge C43, while the threshold voltage for comparator A is lowered due to the paralleling of R29 and R27. The new threshold voltage of comparator A, together with the time constant of R30 and C43 set the time from pulling EN pin low to set it high again. Therefore the frequency of re-starting can be adjusted by changing these time-constants and the threshold voltage at INA+. Threshold voltages at INA+ are given by



Once the threshold voltage VTHRE_A1 is known, the delay time from INB- goes low to OUTA goes low, TD1, and is given by



The time period for EN stays low and is given by



where the 0.6V is the voltage drop across D3.

The total hiccup period is equal to TD1+TD2+TSS, where TSS is the soft start time. Actual time is slightly longer than the calculated one due to the delay introduced by R31 and C42. R31 and C42 are used to avoid false triggering due to noise.
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APP 1901:
アプリケーションノート 1901,AN1901, AN 1901, APP1901, Appnote1901, Appnote 1901