Frequently Asked Questions for the MAX1470 315MHz Low-Power, +3V Superheterodyne Receiver
How do I select the right crystal for my MAX1470 application?
The key is to find out how much capacitance exists between XTAL1 and XTAL2 on your board and to get a crystal which is designed to oscillate at that capacitance. For example, the MAX1470 evkit presents a capacitance of about 5pF between XTAL1 and XTAL2. Therefore if a crystal designed to oscillate with a 5pF load is used, no additional capacitance is needed and you can "short" the series capacitors. If a crystal designed to operate at a higher load capacitance is used, the crystal will oscillate at a higher frequency, and additional capacitance is needed to pull the crystal to the correct frequency. As a rule, parallel capacitance is needed to pull the crystal lower, while series is needed to pull it higher. Ultimately, the best test is to monitor the IF frequency (after the filter) on a spectrum analyzer. The deviation of the IF from 10.7MHz will determine how much capacitance needs to be added, keeping in mind that the added capacitance will affect "cold" start-up time and the shutdown current. Please refer to the application note: "How to Choose a Quartz Crystal Oscillator for the MAX1470 Superheterodyne Receiver
How critical is the ESR requirement of 70 Ω max for the MAX1470 crystals? I am trying to get some samples quickly and one source I have found cannot provide an ESR of less than 150 Ω. Would this work?
The design of the control loop is such that it could accommodate such a high ESR. A high ESR will increase current consumption (slightly) and will increase "cold" start-up time (not an issue with the MAX1470 since the oscillator circuit is running continuously even in shutdown mode) Having said all that, in the long term a lower ESR value would be preferable.
I have a TDA based design that I would like to convert to the MAX1470. Can you help?
Please refer to the application note:"How to Modify an Existing Design from a TDA5200 or TDA5201 to a MAX1470 Superheterodyne Receiver
The MAX1470 startup time is listed as 250µsec. What does that include?
The 250µsec start-up time is from the positive edge of the PWRDN signal to valid data, with approximately 100msec of power cycling. This time is unaffected by minimum sensitivity and includes the time it takes for the PLL to lock. The PLL lock time is actually more in the 100µsec range. It should be noted that the start up time from "cold" could be up to 10ms. This is due to the crystal start up time and any pulling capacitors that it may have. This is the main reason why the PWRDN feature keeps the crystal running.
It is true that this time doesn't include the time for the baseband circuitry to slice the data. The time for the baseband circuitry depends on the time constants and also on the power cycling frequency. When the MAX1470 is in PWRDN mode, the data slicer inputs are disconnected from R1 and C4 to prevent the cap from discharging. If wake-up times are spaced too far apart, then the cap could discharge, adding to the start-up time.
Does the PWRDN pin (pin 27) have an internal pull-up or pull-down?
As far as the shutdown pin, there is no internal pull-up or pull-down. Therefore, it would be recommended to include one externally to control it in high impedance cases. Keep in mind to use a large value, so as to reduce current draw.
In the typical applications circuit, the tank component values are 27nH and 4.7pF for 315MHz. A quick calculation indicates to me that for the tank to resonate at 315MHz these values should be higher. What gives?
You're right. The calculations take into consideration about 5nH of stray inductance and 4.0pF of stray capacitance. These values are based on the Maxim Evkit, but will obviously be layout dependent.
What is the LNA input impedance at various frequencies? The data sheet lists the 315MHz value as 50-j200.
The LNA input can be modeled as a 50-Ω resistor in series with a 2.5pF capacitor. Therefore, the value for s11 at 433 is: 50-j145.
What pin is the OSC input so that I can drive it with my signal generator instead of using a crystal?
Pin 28 (XTAL2). Use a 1nF blocking capacitor. Also, use another 1nF capacitor to AC short pin 1 (XTAL1) to GND.
The MAX1470 shutdown supply current is listed as 1.25µA. What does that include?
The 1.25µA current includes the crystal, but does not include any additional pulling capacitors. Crystal pulling will increase this current. See Figure 1
Does the MAX1470 data filter/data slicer circuitry work well with PWM type signals that have a varying DC offset or is it more suited toward Manchester encoding which has no DC offset?
The way the typical circuit is setup, it is more suitable for no DC offset signals. That isn't to say that the IC wouldn't work with varying DC offset. The slicing threshold may have to be setup differently.
One of the problems I face is, in a no-rx-signal condition the data slicer compares noise with noise and thus generates false output. Any ideas on how to suppress this noise?
Unfortunately this is a normal phenomena. You can force an offset on the slicer by adding a pull-up resistor on pin 20. However, this will reduce your sensitivity. Another solution is to add a preamble to the transmitter so the receiver can distinguish between noise and signal. Your micro can sample the receiver output periodically and check for a valid signal.