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Reference Design for Power-over-Ethernet (PoE) Midspan or Endpoint Insertion



Overview

This application note discusses the features of a reference design for Power-over-Ethernet (PoE) midspan or endpoint insertion. The reference design's modular hardware allows flexible implementation of 4 to 192 Ethernet ports. The design is based on the MAX5945, a quad network power controller. A MAXQ2000 microcontroller provides system-level control, and controls and monitors the MAX5945 power controllers. The reference design can also be used in stand-alone mode, where it is configured by a PC over an RS-232 or USB interface.

Overview

This application note discusses the features of a reference design for Power-over-Ethernet (PoE) midspan or endpoint insertion. The reference design's modular hardware allows flexible implementation of 4 to 192 Ethernet ports. The design is based on the MAX5945, a quad network power controller. A MAXQ2000 microcontroller provides system-level control, and controls and monitors the MAX5945 power controllers. The reference design can also be used in stand-alone mode, where it is configured by a PC over an RS-232 or USB interface.

PoE overview

Ethernet as a whole is standardized in IEEE® 802.3. PoE/PoE+ are standardized in IEEE 802.3af/at, respectively. The three most common types of Ethernet networks are 10BASE-T (10MHz), 100BASE-TX (100MHz), and 1000BASE-T (1GHz). These three forms all utilize the same medium, Category 5 (CAT-5) cables. CAT-5 cables contain four pairs consisting of two wires each (eight wires total, numbered and paired as 1-2, 3-6, 4-5, and 7-8). For 10/100MHz Ethernet, only two of the four pairs (1-2 and 3-6) are used for data transmission. (1GHz Ethernet uses all 4 pairs.)
In a PoE midspan insertion solution, the power sourcing equipment (PSE) uses pairs 4-5 and 7-8 for power distribution. Figure 1 shows a midspan configuration for 10/100MHz Ethernet, where power is distributed directly through the unused pairs. The positive PSE output (V+) is connected to wires 4 and 5, while the negative PSE output (V-) is connected to wires 7 and 8.

Figure 1. PoE midspan insertion schematic for 10/100MHz Ethernet.
In a PoE endpoint insertion solution, the PSE uses pairs 1-2 and 3-6 for power distribution (Figure 2). The power in an endpoint configuration is supplied as a common-mode bias (DC) on the cable pairs, while Ethernet data is transformer coupled and fully differential (AC). The polarity of the PSE outputs is not defined for endpoint applications.

Figure 2. PoE endpoint insertion schematic for 10/100/1000MHz Ethernet.
A similar transformer-coupled configuration can be applied to midspan configurations (pairs 4-5 and 7-8). This configuration enables all four pairs of the CAT-5 cable to carry both data (compatible with both 10/100MHz and 1GHz Ethernet) and power (endpoint and/or midspan). The PSE checks if a valid powered device (PD) is connected and, if so, ramps up the supply and monitors the current provided to the PD. In multiport solutions, one can also assign priorities to the individual ports. This will ensure that the highest priority ports are always powered, while other ports can be switched off if the available power is insufficient.

Reference design hardware

The reference design hardware consists of:

  • A motherboard and up to five DIMM 3.3V-format PC boards. The motherboard holds five 168-pin DIMM-style connectors, RJ-45 connectors/magnetics for 32 Ethernet-ports, a ±50V isolated RS-232 transceiver (MAX3250), and a SPI™-to-USB controller (MAX3420).
  • Three types of DIMM-format cards.
  • A master card holds a MAXQ2000 microcontroller, a MAX5020 DC-DC converter to generate +3.3V output from -48V input, and six MAX5945 network power controllers to power 24 channels. The MAXQ2000 uses I²C to communicate with the MAX5945s, which are located either on the master card itself or on additional slave cards.
  • A slave card holds six MAX5945 network power controllers to power 24 channels.
  • A slave B card holds four MAX5945 network power controllers to power 16 channels

One master card is always needed, while the number of slave cards is based on the number of required channels. Figure 3 shows the block diagram for the reference design.
Figure 3. Block diagram of the reference design that features the MAX5945 PoE network controllers.
Figure 3. Block diagram of the reference design that features the MAX5945 PoE network controllers.

Reference design firmware

As noted above, the reference design operates in either stand-alone mode or with a system-level microcontroller.
Operating with a system-level microcontroller, the system processor (supplied by the user) either configures any settings that would normally be set through I²C, or it simply lets the MAXQ2000 microcontroller use the built-in defaults. The reference design firmware allows the MAXQ2000 microcontroller to control up to 16 MAX5945 network power controllers on each of three I²C buses, for a total of 48 MAX5945 network power controllers. The system processor also specifies which events are to be reported, thus allowing the designer to exercise as much, or as little, control over the system as wanted. The MAXQ2000 retains settings in nonvolatile memory. A packet-based error-detecting protocol allows retransmission of packets, as needed, to ensure no loss of data.
When the design operates in stand-alone mode, the MAXQ2000 and associated firmware manage all the MAX5945s' operation. A PC sets parameters, which are saved in the microcontroller's nonvolatile memory. The PC can also query status and optionally retrieve a log of stored information. Communication between the PC and the MAXQ2000 is done through an RS-232 interface or USB.
From 1 to 48 MAX5945 quad controllers (thus providing 4 to 192 ports) can be connected to the MAXQ2000. The firmware supplied with the reference design will automatically detect and configure the appropriate number of ports, provided that each MAX5945 has an unique I²C address.

Reference design documentation

Documentation for the reference design consists of:

  • MAX5945_MAXQ2000_Design.doc file, a description of the reference hardware and firmware
  • 32-Channel Schematic Motherboard Rev D.pdf", a schematic and layout of the motherboard
  • MAX5945 24-Channel Ref Design Rev D.pdf", the schematic and layout of the 168 DIMM-format master and slave cards
  • MAX5945_RefGuide.pdf", a User's Guide for the reference design
  • MAX5945refspec.doc, a detailed description of the firmware and what it does
  • MAX5945ver3_1.hex, the MAXQ2000 firmware
  • MAX5945.exe, the PC software

This documentation is available for download.

 
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MAX5945
Power over LAN用クワッドネットワークパワーコントローラ

  • IEEE 802.3af準拠
  • エンドポイントまたはミッドスパンPSEアプリケーションで4個の独立した-48V給電のイーサネットポートを制御
  • 広いディジタル電源入力、VDIG、およびコモンモード範囲:VEE~(AGND + 7.7V)

MAXQ2000
低電力LCDマイクロコントローラ

  • 高性能、低電力の16ビットRISCコア
  • プログラムおよびデータメモリ
  • ペリフェラルの特長