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Layout Guidelines for the MAX16974/MAX16975/MAX16976 DC-DC Converters

筆者: Pankaj Kashikar

Abstract: The MAX16974/MAX16975/MAX16976 high-performance DC-DC converters are standard buck controllers designed for automotive applications. This application note explains how to optimize the layout of these ICs. An example layout is provided at the end of the document.

Introduction

The MAX16974/MAX16975/MAX16976 DC-DC converters are standard buck controllers designed for automotive applications. These controllers feature an integrated high-side N-channel FET and an external free-wheeling diode. Proper PCB layout of the IC, along with all the external components, is critical for reliable operation and for minimizing EMI emissions. This application note highlights some of the key points of the circuits for optimizing the layout. Figure 1 shows the typical application circuit of these high-performance converters.

Typical Applications Schematic

Figure 1. Typical application circuit.
Figure 1. Typical application circuit.

DC and AC Current Paths

Figure 2 shows the AC and DC current paths for the MAX16974/MAX16975/MAX16976 family.

Figure 2a. DC current paths when the HSFET is ON (black) and when the catch diode turns ON (red).
Figure 2a. DC current paths when the HSFET is ON (black) and when the catch diode turns ON (red).

Figure 2b. AC current path subtraction of the DC current paths shown in Figure 2a.
Figure 2b. AC current path subtraction of the DC current paths shown in Figure 2a.

Placement of Components Critical to the AC Current Path

For optimum layout and lowering EMI, the AC current path shown in Figure 2b is most critical. This path consists of input capacitors CIN1 and CIN2 and the Schottky catch diode D. The input capacitors maintain a stable input voltage for the SUP and SUPSW pins of the IC. CIN1 is the larger bulk capacitor and CIN2 is the ceramic capacitor, which provides instantaneous current. The placement of CIN2 is critical and needs to be as close as possible to the SUPSW and SUP pins. Use two different CIN2 capacitors and place them near the SUPSW and SUP pins. If CIN2 is placed away from the SUP and SUPSW pins, then the inductance between the CIN2 and the IC pins will cause voltage change on the pin of the IC and affect performance.

The Schottky catch diode is the next important component and needs to be placed close to the LX pin of the IC. This LX pin is the switching pin and undergoes instantaneous change in current when the DC current paths switch from "black" to "red" in Figure 2a. This pin is also the single source of noise for the IC. By placing the Schottky catch diode as close as possible to the LX pin, we minimize any trace inductance and reduce the voltage change on the LX pin when the change in the DC-current path occurs.

Additionally, a snubber R-C network can be used and placed as close as possible to the LX pin. This R-C network will minimize EMI and prevent instantaneous change in voltage on the pin due to the stray inductance. Another way to control voltage on the LX pin is to add a series resistor with the boost capacitor CBST. This will slow down the turn-on of the internal HSFET of the IC, which in turn will control the rate of voltage rise on the LX pin.

Finally, the AC current loop comprising of CIN2, HSFET, the Schottky catch diode, and GNDs should be as tight as possible. This will keep the current circulation within a small area and away from the sensitive control pins of the IC.

Placement of Other Components

Once the above critical components have been placed, the rest of the components should be placed around it. The inductor L1 and the output capacitor COUT should be placed next such that the corresponding DC current loops are as compact as possible.

Another important component is the BIAS capacitor CBIAS. The voltage on this pin powers all the internal control circuitry of the IC. Also, the boost capacitor CBST is charged from the bias capacitor when the Schottky catch diode conducts in a normal switching cycle, as shown in Figure 3.

Figure 3. Boost charge cycle shown above (green).
Figure 3. Boost charge cycle shown above (green).

To ensure stable operating voltage on the BIAS pin, the capacitor CBIAS should be place adjacent to the pin of the IC. This will minimize the trace inductance between the BIAS pin and the CBIAS capacitor.

Thermal Considerations

The MAX16974 has an exposed pad at the back of the IC. This exposed pad is the primary heat dissipation element for the package. MAX16974 has a HSFET integrated that is capable of delivering 2A. To extract full power out of the package, proper soldering of the exposed pad to the PCB is critical. The MAX16974's exposed pad is at ground potential, so good connection to the ground plane helps to remove heat from the package. A copper area should be used on the PCB to solder the exposed pad directly onto this copper area. Vias should be added to this copper area and connected to the ground planes in other layers. These vias help proper ground connectivity and dissipate the heat from the package onto the PCB.

Example Layout of the MAX16974 Evaluation Kit

Figures 4 to 8 show the schematic and layout of the MAX16974 EV kit (MAX16974EVKIT) using a 4-layer PCB and follow the above layout guidelines. The inner two layers (Figures 6 and 7) are used as ground planes and help dissipate heat from the exposed pad of the MAX16974. The connection to these ground planes is primarily through vias in the exposed pad copper area in the top layer.

Figure 4. MAX16974EVKIT schematic.
Figure 4. MAX16974EVKIT schematic.

Figure 5. Top layer of the MAX16974EVKIT.
Figure 5. Top layer of the MAX16974EVKIT.

Figure 6. Layer 2 of the MAX16974EVKIT (ground plane).
Figure 6. Layer 2 of the MAX16974EVKIT (ground plane).

Figure 7. Layer 3 of the MAX16974EVKIT (ground plane).
Figure 7. Layer 3 of the MAX16974EVKIT (ground plane).

Figure 8. Bottom layer of the MAX16974EVKIT.
Figure 8. Bottom layer of the MAX16974EVKIT.

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© Oct 10, 2011, Maxim Integrated Products, Inc.
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APP 5137: Oct 10, 2011
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