Product Details
Key Features
Applications/Uses
Simplified Block Diagram
Technical Docs
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Sampling:
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Key Features
- Low-Cost DC-DC Controller with Two LDOs
- Wide Input Range: 4.5V to 28V
- 300kHz to 1.4MHz Adjustable Switching Frequency
- Low Noise for High Data-Rate xDSL Applications
- Synchronizable to External Clock
- Adjustable Soft-Start
- Lossless Adjustable Foldback Current Limit
- Power-On Reset with 140ms Delay
- Adjustable Input Power-Fail Warning for Dying Gasp
- Selectable Output-Voltage Sequencing or Output-Voltage Tracking
Applications/Uses
- Set-Top Boxes
- Wireless Routers
- xDSL, Cable, ISDN Modems, and Routers
Description
The DC-DC controller switching frequency can be set with an external resistor from 300kHz to 1.4MHz, to allow for the optimization of cost, size, and efficiency. For noisesensitive applications, the DC-DC controller can also be synchronized to an external clock, minimizing noise interference. Operation above 1.1MHz reduces noise for high data-rate xDSL applications. An adjustable soft-start and adjustable foldback current limit provide reliable startup and fault protection. The DC-DC controller output voltage can be set externally to a voltage from 1.25V to 5.5V. Current limiting is accomplished by inductor current sensing for improved efficiency, or by an external sense resistor for better accuracy.
The MAX8513/MAX8514s' first LDO controller is designed to provide a low-cost, high-current regulated output from 0.8V to 5.5V using an N-channel MOSFET or a low-current output using a low-cost NPN transistor. The MAX8513's second regulator can be used to generate 0.8V to 27V output with a low-cost PNP transistor. Both LDO regulators can operate either from the DC-DC controller output or from a higher voltage derived with a flyback overwinding on the DC-DC converter inductor. The MAX8514's second LDO regulator is designed to provide a negative output with an NPN transistor.
A sequence input allows the outputs to either power up together, or for the DC-DC regulator to power up first and each LDO controller to power up in sequence. An input power-fail output (active-low PFO) is provided for input power-fail warning, such as in dying-gasp applications. A power-on reset circuit with a 140ms delay is also included to indicate when all outputs have achieved regulation and stabilized.
Technical Docs
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.