Simplified Block Diagram
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- Operates from a 1.6V to 5.5V Supply (MAX1956)
- 0.5% Output Accuracy
- 0.8V to 0.9VIN Output Range
- Up to 25A per Phase Output Current
- On-Chip Boost Regulator Provides 5V Gate Drive
- Up to 93% Efficiency
- 180° Out-of-Phase Operation
- ±4% Voltage Margining
- Lossless, Foldback Current Limit
- Selectable Voltage Sequencing
- Synchronizable to External Clock
- Digital Soft-Start and Soft-Stop
- Small 28-Pin, 5mm x 5mm Thin QFN Package
- DSP, ASIC, µP, and FPGA Supplies
- Telecom and Network Equipment
- Wireless Base Stations
An on-chip bias supply generates a 5V gate drive to deliver up to 25A output current per phase with low-cost N-channel MOSFETs at up to 93% efficiency. Lossless adjustable current limit eliminates expensive current-sense resistors and improves efficiency. Foldback current limit reduces power dissipation during short-circuit conditions and handles transient overloads better than controllers using hiccup-mode short-circuit protection.
Output voltage margining shifts output voltage by ±4% from the nominal value to simplify system test. Outputs also can be powered up and down in selectable sequences to meet core and logic supply-rail requirements.
The MAX1955/MAX1956 are available in a 28-lead thin QFN package with exposed pad.