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Key Features
Applications/Uses
Parametric specs for Battery Backup Circuits
| Reset Thresh. (V) | 3.3 to 5.5 |
| Reset Out | No |
| ICC (µA) (max) | 500 |
| Oper. Temp. (°C) | -55 to +125 -40 to +85 0 to +70 |
| Package/Pins | PDIP/8 SOIC (N)/8 SOIC (W)/16 |
| Budgetary Price (See Notes) | 3.86 |
Parametric specs for Non-Volatile RAM Controllers
| CE Cntrl. | Yes |
| Smart Socket w/Int. Batt. | No |
| Li Batt. Monitor | No |
| Pwr. Fail Out | No |
| RAMs Controlled | 1 |
| VSUPPLY (V) | 5 |
| Package/Pins | PDIP/8 SOIC (N)/8 SOIC (W)/16 |
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Simplified Block Diagram
Technical Docs
| Data Sheet | Nonvolatile RAM Controller | Jun 30, 2006 |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Parameters
Parametric specs for Battery Backup Circuits
| Reset Thresh. (V) | 3.3 to 5.5 |
| Reset Out | No |
| ICC (µA) (max) | 500 |
| Oper. Temp. (°C) | -55 to +125 -40 to +85 0 to +70 |
| Package/Pins | PDIP/8 SOIC (N)/8 SOIC (W)/16 |
| Budgetary Price (See Notes) | 3.86 |
Parametric specs for Non-Volatile RAM Controllers
| CE Cntrl. | Yes |
| Smart Socket w/Int. Batt. | No |
| Li Batt. Monitor | No |
| Pwr. Fail Out | No |
| RAMs Controlled | 1 |
| VSUPPLY (V) | 5 |
| Package/Pins | PDIP/8 SOIC (N)/8 SOIC (W)/16 |
Key Features
- Battery Backup
- Memory Write Protection
- 230µA Operating-Mode Quiescent Current
- 2nA Backup-Mode Quiescent Current
- Battery Freshness Seal
- Optional Redundant Battery
- Low Forward-Voltage Drop on VCC Supply Switch
- 5% or 10% Power-Fail Detection Options
- Tests Battery Condition During Power-Up
- 8-Pin SO Available
Applications/Uses
- µP-Controlled Systems
- Computers: Desktop, Workstation, Server
- Embedded Systems
Description
The MXD1210 nonvolatile RAM controller is a very low-power CMOS circuit that converts standard (volatile) CMOS RAM into nonvolatile memory. It also continually monitors the power supply to provide RAM write protection when power to the RAM is in a marginal (out-of-tolerance) condition. When the power supply begins to fail, the RAM is write protected, and the device switches to battery-backup mode.
Technical Docs
| Data Sheet | Nonvolatile RAM Controller | Jun 30, 2006 |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
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