MAX1510
Low-Voltage DDR Linear Regulators
Low-Cost, Low-Voltage DDR Linear Regulators Source and Sink Up to 3A Peak (typ) Using Internal n-Channel MOSFETs
MyMaxim SubscriptionsProduct Details
Key Features
Applications/Uses
| VIN (V) (min) | 1.1 |
| VIN (V) (max) | 3.6 |
| Adj. VOUT (V) (min) | 0.5 |
| Adj. VOUT (V) (max) | 1.5 |
| Rated ILOAD (mA) | 3000 |
| # Regulators | 1 |
| VDROPOUT @Rated ILOAD (V) (typ) | 0.35 |
| ICC (µA) (max) | 1300 |
| Low Batt./ Pwr. Fail Out | No |
| POK/Reset Thresh. (V) (nom) | Vout-10% |
| Watchdog | No |
| Reverse Batt. Protect. | No |
| Oper. Temp. (°C) | -40 to +85 |
| Package/Pins | TDFN/10 |
| Budgetary Price (See Notes) | 3.32 |
Simplified Block Diagram
Technical Docs
| Data Sheet | Low-Voltage DDR Linear Regulators | Apr 14, 2020 |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Parameters
| VIN (V) (min) | 1.1 |
| VIN (V) (max) | 3.6 |
| Adj. VOUT (V) (min) | 0.5 |
| Adj. VOUT (V) (max) | 1.5 |
| Rated ILOAD (mA) | 3000 |
| # Regulators | 1 |
| VDROPOUT @Rated ILOAD (V) (typ) | 0.35 |
| ICC (µA) (max) | 1300 |
| Low Batt./ Pwr. Fail Out | No |
| POK/Reset Thresh. (V) (nom) | Vout-10% |
| Watchdog | No |
| Reverse Batt. Protect. | No |
| Oper. Temp. (°C) | -40 to +85 |
| Package/Pins | TDFN/10 |
| Budgetary Price (See Notes) | 3.32 |
Key Features
- Internal Power MOSFETs with Current Limit (3A typ)
- Fast Load-Transient Response
- External Reference Input with Reference Output Buffer
- 1.1V to 3.6V Power Input
- ±15mV (max) Load-Regulation Error
- Thermal-Fault Protection
- Shutdown Input
- Power-Good Window Comparator with 2ms (typ) Delay
- Small, Low-Profile 10-Pin, 3mm × 3mm TDFN Package
- Ceramic or Polymer Output Capacitors
Applications/Uses
- Active Termination Buses
- Chipset/RAM Supplies as Low as 0.5V
- DDR Memory Termination
- Graphics Processor Core Supplies
- Notebook and Desktop Computers
Description
The MAX1510/MAX17510 DDR linear regulators source and sink up to 3A peak (typ) using internal n-channel MOSFETs. These linear regulators deliver an accurate 0.5V to 1.5V output from a low-voltage power input (VIN = 1.1V to 3.6V). The MAX1510/MAX17510 use a separate 3.3V bias supply to power the control circuitry and drive the internal n-channel MOSFETs.
The MAX1510/MAX17510 provide current and thermal limits to prevent damage to the linear regulator. Additionally, the MAX1510/MAX17510 generate a power-good (PGOOD) signal to indicate that the output is in regulation. During startup, PGOOD remains low until the output is in regulation for 2ms (typ). The internal soft-start limits the input surge current.
The MAX1510/MAX17510 power the active-DDR termination bus that requires a tracking input reference. The MAX1510/MAX17510 can also be used in low-power chipsets and graphics processor cores that require dynamically adjustable output voltages. The MAX1510/MAX17510 are available in a 10-pin, 3mm × 3mm thin DFN package.
Technical Docs
| Data Sheet | Low-Voltage DDR Linear Regulators | Apr 14, 2020 |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Request a Quote