DeepCover Secure Microcontroller with ARM922T Processor Core

Secure 32-Bit ARM Processor Supporting Linux OS with Advanced Physical Security

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DeepCover® embedded security solutions cloak sensitive data under multiple layers of advanced physical security to provide the most secure key storage possible.

The DeepCover Secure Microcontroller (Zatara® ZA9L1) is a highly integrated system-on-chip (SoC) microcontroller based on the ARM922T 32-bit/16-bit core and tailored to the specific requirements of point-of-sale (POS) terminal design and meet the strict security requirements of the Payment Card Industry (PCI) Security Standards Council 2.0 specification. Running at 192MHz, the ZA9L1 is one of the fastest high-security microcontrollers available. The ZA9L1 provides a rich set of features on a single chip that reduces the manufacturing cost and time-to-market for secure transaction products such as POS terminals, vending machines, and security panels. The Zatara ZA9L1 includes the essential security features required of a POS terminal. It also provides seamless interfaces to LCD displays and keypads, and includes a wide array of peripherals such as an ADC, DMAs, UARTs, GPIOs, and timers that add flexibility to control and differentiate the system design.

System security is enhanced by a number of physical and logical protection mechanisms including environmental sensors (temperature, voltage, and frequency), true hardware random-number generator (RNG), real-time clock (RTC), and 4KB of secure nonvolatile SRAM storage with fast erase capability upon tampering. On power-up, application code is first cryptographically verified for authenticity to ensure that attackers cannot insert their own application code.

The ZA9L1 provides extensive communication support with three UARTs, two independent SPI ports, a USB 2.0 On-The-Go (OTG) interface, and ample GPIO pins to implement any communication interface. The ZA9L1 also has a targeted set of peripherals to support PIN pad applications, including an LCD interface; multiple timers with PWM; a watchdog; a 4-channel, 10-bit ADC; two ISO 7816 smart card UARTs; and a 3-track magnetic stripe reader interface.

Key Features

  • 32-Bit ARM922T CPU Core
    • 8KB/8KB I/D-Caches
    • MMU Supporting Linux® and Windows® Embedded CE Operating Systems
    • 192MHz Performance
    • JTAG Embedded ICE Support
  • 64KB Embedded Zero-Wait-State SRAM
  • Vectored Interrupt Controller
  • External Bus Interface
    • Dual External Bus Architecture (Primary and Secondary)
    • 24-Bit Address, 16-Bit Data
    • Synchronous Flash
    • SDRAM in 16MB to 512MB Configurations
  • Power Management Unit
    • 14MHz to 40MHz Oscillator and Phase-Locked Loop (PLL) Generated System Clocks
    • 32.768kHz Oscillator for RTC
    • Clock Disable on a Peripheral-by-Peripheral Basis
    • Three Modes: Active, Idle, and Battery Backup
  • Real-Time Clock
  • Watchdog Timer (WDT)
  • Two Dedicated SPI Interfaces
  • USB 2.0 OTG Interface
  • Nine Timer/Counters
  • Three UARTs
    • 1 x 8-Wire Interface
    • 2 x 4-Wire Interface
  • POS Security Features for PCI Compliance
    • Voltage and Temperature Sensors
    • Sensors for Tamper Switches and Wire Mesh
    • Clock Frequency and Glitch Protection
    • Battery-Backed Secure Memory with Active Zeroization
  • Embedded Boot ROM
  • 32-Bit Unique ID Number
  • NIST 800-22-Compliant Random-Number Generator
  • FIPS 180-2-Compliant SHA-1 Hash Generator
  • Two ISO 7816 Smart Card UARTs
  • 3-Track Magnetic Stripe Reader Interface
  • Display Controller Interface
  • Up to 76 General-Purpose Input/Output (GPIO) Pins
  • 10-Bit ADC, 4-Channel, 45ksps
  • Eight independent DMA Channels
  • Voltage: Dual 1.8V and 3.3V Supplies
  • 3.3V I/O Pins with 5V Tolerant I/O for UART and SPI
  • 256-Pin BGA (1.0mm Ball Pitch) Package


  • EPP
  • Healthcare Reader
  • Metering
  • PIN Pads
Request Reliability Report for: ZA9L1 
Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C   Material Composition  

Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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