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High-Reliability, Tiny, Ultra-Low-Power Arm Cortex-M4F Microcontroller with 12-Bit 1MSPS ADC

Cost-effective, highly integrated, and highly reliable MCU that enables designs with complex sensor processing

Product Details

Key Features

Parametric specs for Microcontrollers
MCU Core ARM Cortex-M4F
Internal Flash (KBytes) 1000
Core Clock Speed (MHz) (max) 100
Data Processing 32-bit
Internal SRAM (KBytes) 200
Package/Pins TQFN-CU/40
Budgetary
Price (See Notes)
3.41
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Simplified Block Diagram

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Parameters

Parametric specs for Microcontrollers
MCU Core ARM Cortex-M4F
Internal Flash (KBytes) 1000
Core Clock Speed (MHz) (max) 100
Data Processing 32-bit
Internal SRAM (KBytes) 200
Package/Pins TQFN-CU/40
Budgetary
Price (See Notes)
3.41

Key Features

  • High-Efficiency Microcontroller for Low Power High Reliability Devices
    • Arm Cortex-M4 Processor with FPU Up To 100MHz
    • 1MB Dual Bank Flash with Error Correction
    • 200KB SRAM (160KB with ECC enabled),Optionally Preserved in Lowest Power Modes
    • EEPROM Emulation on FLASH
    • 16KB Unified Cache with ECC
    • Resource Protection Unit (RPU) and Memory Protection Unit (MPU)
    • Dual or Single Supply Operation, 1.7V to 3.6V
    • Wide Operating Temperature: -40°C to +105°C
  • Flexible Clocking Schemes
    • Internal High Speed 100MHz Oscillator
    • Internal Low Power 7.3728MHz and Ultra Low Power 80kHz Oscillators
    • 14MHz-32MHz oscillator (external crystal required)
    • 32.768kHz oscillator (external crystal required)
    • External Clock Input for CPU, LPUART, LPTIMER
  • Power Management Maximizes Uptime for Battery Applications
    • 53.2µA/MHz ACTIVE at 0.9V Up To 12MHz
    • 61.5µA/MHz ACTIVE at 1.1V Up To 100MHz
    • 2.94&microA Full Memory Retention Power in BACKUP Mode at VDD = 1.8V
    • 350nA Ultra-Low Power RTC at VDD = 1.8V
    • Wake from LPUART or LPTMR
  • Optimal Peripheral Mix Provides Platform Scalability
    • Up to 28 General-Purpose I/O Pins
    • Up to Two SPI Master/Slave (Up to 50Mbps)
    • Up to Three 4-Wire UART
    • One Low Power UART (LPUART)
    • Up to Three I2C Master/Slave 3.4Mbps High Speed
    • Ten-Channel Standard DMA Controller
    • Up To Four 32-Bit Timers (TMR)
    • Up to Two Low Power 32-Bit Timers (LPTMR)
    • Two Windowed Watchdog Timers
    • One I2S Master/Slave for Digital Audio Interface
    • One 12-ch, 12-bit 1MSPS SAR ADC w/ On-Die Temperature Sensor
    • Up to Two Low Power Comparators
  • Security and Integrity
    • Available ECDSA Based Cryptographic Secure Bootloader in ROM
    • Secure loader interface over UART
    • AES 128/192/256 Hardware Acceleration Engine
    • TRNG compliant to SP800-90B

Applications/Uses

  • Battery-Powered Medical Devices
  • Motion/Motor Control, Industrial Sensors
  • Optical Communication Modules, Secure Radio Modem Controller

Description

In the DARWIN family, the MAX32672 is an ultra-low-power, cost-effective, highly integrated, and highly reliable 32-bit microcontroller enabling designs with complex sensor processing without compromising battery life. It combines a flexible and versatile power management unit with the powerful Arm® Cortex®-M4 processor with a floating-point unit (FPU). The MAX32672 also offers legacy designs an easy and cost-optimal upgrade path from 8- or16-bit microcontrollers.

The device integrates 1MB of Flash and 160KB-200KB of SRAM to accommodate application and sensor code. Error Correction Coding (ECC), capable of single error correction and double error detection (SEC-DED), is implemented on the entire Flash, RAM, and cache to ensure extremely reliable code execution even in the harshest of environments. Brownout detection ensures proper operation during power-down and power-up events and unexpected supply transients. The Flash is organized into two equal-size physical banks to allow execute-while-write and facilitate "live upgrades."

Multiple high-speed peripherals such as 3.4MHz I2C, 50MHz SPI, and UART are included to maximize communication bandwidth. In addition, a low-power UART (LPUART) is available for operation in the lowest power sleep modes to facilitate wake-up activity without any loss of data. A total of six timers with I/O capability are provided, including two low-power timers to enable pulse counting, capture/compare, and pulse-width modulation (PWM) generation, even in the lowest power sleep modes. An Incremental/Quadrature Encoder Interface with multiple diagnostics is included specifically for motor control applications. A 1MSPS 12-ch 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) is integrated for the digitization of analog sensor signals or other analog measurements. Two low-power comparators, available in all low-power modes, allow energy-efficient monitoring and wake-up on external analog signals. The device packs all this capability in a tiny form factor: 5x5mm 40-pin TQFN-EP.

Simplified Block Diagram

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .