MAX32650
Ultra-Low-Power Arm Cortex-M4 with FPU-Based Microcontroller (MCU) with 3MB Flash and 1MB SRAM
DARWIN Generation UP MCUs Are Built to Run Big Applications from Small Batteries
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Key Features
Applications/Uses
| MCU Core | ARM Cortex-M4F |
| Internal Flash (KBytes) | 3072 |
| Core Clock Speed (MHz) (max) | 120 |
| Data Processing | 32-bit |
| Internal SRAM (KBytes) | 1024 |
| Package/Pins | TQFP/144 WLP/96 |
| Budgetary Price (See Notes) | 6.65 |
Simplified Block Diagram
Technical Docs
Part 1: What’s an LCD Controller Anyway?
Customer Testimonial: WHOOP
Why on Earth Don’t You Include a Clock in Your Design?
Using the LCD Controller on the MAX32650, Part 1: What’s an LCD
Get to Know Arm Cortex-M4 Microcontroller Tutorial: Part 1
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Parameters
| MCU Core | ARM Cortex-M4F |
| Internal Flash (KBytes) | 3072 |
| Core Clock Speed (MHz) (max) | 120 |
| Data Processing | 32-bit |
| Internal SRAM (KBytes) | 1024 |
| Package/Pins | TQFP/144 WLP/96 |
| Budgetary Price (See Notes) | 6.65 |
Key Features
- Ultra Efficient Microcontroller for Battery-Powered Applications
- 120MHz Arm Cortex-M4 with FPU
- SmartDMA Provides Background Memory Transfers with Programmable Data Processing
- 120MHz High-Speed and 40MHz Low-Power Oscillators
- 7.3728MHz Low Power Oscillators
- 32.768kHz and RTC Clock (Requires External Crystal)
- 8kHz, Always-on, Ultra-Low-Power Oscillator
- 3MB Internal Flash, 1MB Internal SRAM
- 104µW/MHz Executing from Cache at 1.1V
- Five Low-Power Modes: Active, Sleep, Background, Deep-Sleep, and Backup
- 1.8V and 3.3V I/O with No Level Translators
- Scalable Cached External Memory Interfaces:
- 120MB/s HyperBus/Xccela DDR Interface
- SPIXF/SPIXR for External Flash/RAM Expansion
- 240Mbps SDHC/eMMC/SDIO/microSD Interface
- Optimal Peripheral Mix Provides Platform Scalability
- 16-Channel DMA
- Three SPI Master (60MHz)/Slave (48MHz)
- One QuadSPI Master (60MHz)/Slave (48MHz)
- Up to Three 4Mbaud UARTs with Flow Control
- Two 1MHz I2C Master/Slave
- I2S Slave
- Four-Channel, 7.8ksps, 10-bit Delta-Sigma ADC
- USB 2.0 Hi-Speed Device Interface with PHY
- 16 Pulse Train Generators
- Six 32-bit Timers with 8mA Hi-Drive
- 1-Wire® Master
- Trust Protection Unit (TPU) for IP/Data and Security
- Modular Arithmetic Accelerator (MAA), True Random Number Generator (TRNG)
- Secure Nonvolatile Key Storage, SHA-256, AES-128/192/256
- Memory Decryption Integrity Unit, Secure Boot ROM
Applications/Uses
- Industrial Sensors, IoT
- Sports Watches, Fitness Monitors
- Wearable Medical Patches, Portable Medical Devices
Description
DARWIN is a new breed of low-power microcontrollers built to thrive in the rapidly evolving Internet of Things (IoT). They are smart, with the biggest memories in their class and a massively scalable memory architecture. They run forever, thanks to wearable-grade power technology. They are also tough enough to withstand the most advanced cyberattacks. DARWIN microcontrollers are designed to run any application imaginable—in places where you would not dream of sending other micro controllers.
Generation UP microcontrollers are designed to handle the increasingly complex applications demanded by today’s advanced battery-powered devices and wireless sensors. The MAX32650–MAX32652 are ultra-low power memory-scalable microcontrollers designed specifically for high-performance, battery-powered applications. They are based on Arm® Cortex®-M4 with FPU CPU with 3MB flash and 1MB SRAM. Memory scalability is supported with multiple memory-expansion interfaces, including a HyperBus™/Xccela™ DDR interface and two SPI execute in place (SPix) interfaces. A secure digital interface supports external high-speed memory cards, including SD, SDIO, MMC, SDHC, and microSD™.
Power-management features provide five low-power modes for clock, peripheral, and voltage control. Individual SRAM banks of 32KB, 96KB, or 1024KB (full retention) can be retained with reduced power consumption. A SmartDMA performs complex background processing while the CPU is off to dramatically reduce overall power consumption.
The MAX32651 is a secure version with a trust protection unit (TPU) which provides a modular arithmetic accelerator (MAA) for fast ECDSA, an AES engine, TRNG, SHA-256 hash, and secure bootloader. A memory decryption integrity unit (MDIU) provides on-the-fly data decryption (plain or executable) stored in external flash.
The MAX32652 is packaged in a high-density, 0.35mm pitch, 140-bump WLP targeted for tiny form factor products that require high I/O counts.
Technical Docs
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
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