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IO-Link Master Transceiver

Easily Scalable to 16 Channels with Auto Wake-Up Polarity Generation

Product Details

Key Features

Applications/Uses

Parametric specs for IO-Link Transceivers and Binary Drivers
Functions IO-Link Master Transceiver
VCC (V) (min) 9
VCC (V) (max) 36
C/Q (mA) (typ) 375
Selectable Slew Rate Yes
Logic-Level Supply Voltage (V) 2.3 to 5.5
Integrated Power 3.3V LDO
5V LDO
Protection Features High Temp Warning and Shutdown
Reverse Polarity
Short Circuit
UVLO
Package/Pins TQFN/24
Oper. Temp. (°C) -40 to +105
Budgetary
Price (See Notes)
4.72
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Simplified Block Diagram

Technical Docs

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Parameters

Parametric specs for IO-Link Transceivers and Binary Drivers
Functions IO-Link Master Transceiver
VCC (V) (min) 9
VCC (V) (max) 36
C/Q (mA) (typ) 375
Selectable Slew Rate Yes
Logic-Level Supply Voltage (V) 2.3 to 5.5
Integrated Power 3.3V LDO
5V LDO
Protection Features High Temp Warning and Shutdown
Reverse Polarity
Short Circuit
UVLO
Package/Pins TQFN/24
Oper. Temp. (°C) -40 to +105
Budgetary
Price (See Notes)
4.72

Key Features

  • IO-Link v.1.0 and v.1.1 Physical Layer Compliant
  • Supports COM1, COM2, and COM3 Data Rates
  • Push-Pull, High-Side, or Low-Side Outputs
  • 300mA C/Q Output Drive
  • 1µF C/Q Load Drive Capability
  • Generates 500mA Wake-Up Pulse
  • Automatic Wake-Up Pulse Polarity
  • Auxiliary Digital Input
  • 5V and 3.3V Linear Regulators
  • SPI Interface for Configuration and Monitoring
  • SPI-Based Chip Addressing
  • EMI Emission Control Through Slew-Controlled Driver
  • Reverse-Polarity Protection on DI
  • Short-Circuit Protection on C/Q
  • High Temperature Warning and Thermal Shutdown
  • Extensive Fault Monitoring and Reporting
  • -40°C to +105°C Operating Temperature Range
  • 4mm x 4mm TQFN Package

Applications/Uses

  • 24V Digital Inputs and Outputs
  • High Port Count IO-Link Masters
  • IO-Link Master Controllers
  • PLC Fieldbus Gateways

Description

The MAX14824 is an IO-Link® master interface that integrates an IO-Link physical layer transceiver with an auxiliary digital input and two linear regulators. High port count IO-Link master applications are supported through in-band SPI addressing, and the 12MHz SPI interface minimizes host controller access times. In-band addressing and selectable SPI addresses enable cascading up to 16 devices.

The device supports all the IO-Link data rates and features slew-rate-controlled drivers to reduce EMI. The driver is guaranteed to drive up to 300mA (min) load currents. Internal wake-up circuitry automatically determines the correct wake-up polarity, allowing for the use of simple UARTs for wake-up pulse generation.

The MAX14824 is available in a 4mm x 4mm, 24-pin TQFN package with exposed pad, and operates over the extended -40°C to +105°C temperature range.

Simplified Block Diagram

MAX14824: Typical Operating Circuit MAX14824: Typical Operating Circuit Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .