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10-Bit Bus LVDS Serializers

Product Details

Key Features

Applications/Uses

Parametric specs for High-Speed Interconnect (Differential Signaling)
Signal Type (Rx) CMOS
LVTTL
Signal Type (Tx) LVDS
Functions Serializer
# Rx 10
# Tx 1
Data Rates (Mbps) 400
VSUPPLY (V) 3.3
Package/Pins SSOP/28
Budgetary
Price (See Notes)
4.79
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Simplified Block Diagram

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Parameters

Parametric specs for High-Speed Interconnect (Differential Signaling)
Signal Type (Rx) CMOS
LVTTL
Signal Type (Tx) LVDS
Functions Serializer
# Rx 10
# Tx 1
Data Rates (Mbps) 400
VSUPPLY (V) 3.3
Package/Pins SSOP/28
Budgetary
Price (See Notes)
4.79

Key Features

  • Standalone Serializer (vs. SerDes) Ideal for Unidirectional Links
  • Framing Bits for Deserializer Resync Allow Hot Insertion Without System Interruption
  • LVDS Serial Output Rated for Point-to-Point and Bus Applications
  • Wide Reference Clock Input Range
    • 16MHz to 40MHz (MAX9205)
    • 40MHz to 66MHz (MAX9207)
  • Low 140ps (pk-pk) Deterministic Jitter (MAX9207)
  • Low 34mA Supply Current (MAX9205)
  • 10-Bit Parallel LVCMOS/LVTTL Interface
  • Up to 660Mbps Payload Data Rate (MAX9207)
  • Programmable Active Edge on Input Latch
  • Pin-Compatible Upgrades to DS92LV1021 and DS92LV1023

Applications/Uses

  • Add/Drop Multiplexers
  • Backplane and Interconnect Applications
  • Cell Phone Base Stations
  • Digital Cross-Connects
  • DSLAM
  • Network Routers and Switches

Description

The MAX9205/MAX9207 serializers transform 10-bit-wide parallel LVCMOS/LVTTL data into a serial high-speed bus low-voltage differential signaling (LVDS) data stream. The serializers typically pair with deserializers like the MAX9206/MAX9208, which receive the serial output and transform it back to 10-bit-wide parallel data.

The MAX9205/MAX9207 transmit serial data at speeds up to 400Mbps and 660Mbps, respectively, over PCB traces or twisted-pair cables. Since the clock is recovered from the serial data stream, clock-to-data and data-to-data skew that would be present with a parallel bus are eliminated.

The serializers require no external components and few control signals. The input data strobe edge is selected by TCLK_R/F. Active-low PWRDN is used to save power when the devices are not in use. Upon power-up, a synchronization mode is activated, which is controlled by two SYNC inputs, SYNC1 and SYNC2.

The MAX9205 can lock to a 16MHz to 40MHz system clock, while the MAX9207 can lock to a 40MHz to 66MHz system clock. The serializer output is held in high impedance until the device is fully locked to the local system clock, or when the device is in power-down mode.

Both the devices operate from a single +3.3V supply, are specified for operation from -40°C to +85°C, and are available in 28-pin SSOP packages.

Simplified Block Diagram

MAX9205, MAX9207: Typical Application Circuit MAX9205, MAX9207: Typical Application Circuit Zoom icon

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .