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Low-Jitter, 10-Port LVDS Repeater

Industry's Lowest-Jitter Multiport LVDS Repeater

Product Details

Key Features

Parametric specs for High-Speed Interconnect (Differential Signaling)
Signal Type (Rx) LVDS
Signal Type (Tx) LVDS
Functions Fan-Out Buffer
# Rx 1
# Tx 10
Data Rates (Mbps) 400
Propagation Delay (ps) (max) 3500
VSUPPLY (V) 3.3
Package/Pins TSSOP/28
Budgetary
Price (See Notes)
8.82
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Simplified Block Diagram

Technical Docs

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Parameters

Parametric specs for High-Speed Interconnect (Differential Signaling)
Signal Type (Rx) LVDS
Signal Type (Tx) LVDS
Functions Fan-Out Buffer
# Rx 1
# Tx 10
Data Rates (Mbps) 400
Propagation Delay (ps) (max) 3500
VSUPPLY (V) 3.3
Package/Pins TSSOP/28
Budgetary
Price (See Notes)
8.82

Key Features

  • Ultra-Low 120psp-p (max) Total Jitter (Deterministic and Random)
  • 100ps (max) Skew Between Channels
  • Guaranteed 400Mbps Data Rate
  • 60µA Shutdown Supply Current
  • Conforms to EIA/TIA-644 LVDS Standard
  • Single +3.3V Supply
  • Fail-Safe Circuit Sets Output High for Undriven Inputs
  • High-Impedance LVDS Input when VCC = 0V

Applications/Uses

  • Add/Drop Multiplexers
  • Backplane and Interconnect Applications
  • Cell Phone Base Stations
  • Clock/Data Distribution
  • Digital Cross-Connects
  • Network Routers and Switches

Description

The MAX9150 low-jitter, 10-port, low-voltage differential signaling (LVDS) repeater is designed for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The device accepts a single LVDS input and repeats the signal at 10 LVDS outputs. Each differential output drives a total of 50Ω, allowing point-to-point distribution of signals on transmission lines with 100Ω terminations on each end.

Ultra-low 120ps (max) peak-to-peak jitter (deterministic and random) ensures reliable communication in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 400Mbps data rate and less than 100ps skew between channels while operating from a single +3.3V supply.

Supply current at 400Mbps is 160mA (max) and is reduced to 60µA (max) in low-power shutdown mode. Inputs and outputs conform to the EIA/TIA-644 LVDS standard. A fail-safe feature sets the outputs high when the input is undriven and open, terminated, or shorted. The MAX9150 is available in a 28-pin TSSOP package.

Refer to the MAX9110/MAX9112 and MAX9111/MAX9113 data sheets for LVDS line drivers and receivers.

Simplified Block Diagram

MAX9150: Typical Application Circuit MAX9150: Typical Application Circuit Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.