Product Details
The ECC public/private key capabilities operate from the NIST defined P-256 curve and include FIPS 186 compliant ECDSA signature generation and verification to support a bidirectional asymmetric key authentication model. The SHA-256 secret-key capabilities are compliant with FIPS 180 and are flexibly used either in conjunction with ECDSA operations or independently for multiple HMAC functions.
Two GPIO pins can be independently operated under command control and include configurability supporting authenticated and nonauthenticated operation including an ECDSA-based crypto-robust mode to support secure-boot of a host processor.
DeepCover embedded security solutions cloak sensitive data under multiple layers of advanced security to provide the most secure key storage possible. To protect against device-level security attacks, invasive and noninvasive countermeasures are implemented including active die shield, encrypted storage of keys, and algorithmic methods.
Secure Boot and Secure Download -
Part 1: Protecting IoT Devices with Secure Authentication
Secure Boot and Secure Download -
Part 3: Using the DS28C36
Secure Boot and Secure Download -
Part 2: Technologies Behind Embedded Security
Key Features
- ECC-256 Compute Engine
- FIPS 186 ECDSA P256 Signature and Verification
- ECDH Key Exchange with Authentication Prevents Man-in-the-Middle Attacks
- ECDSA Authenticated R/W of Configurable Memory
- SHA-256 Compute Engine
- FIPS 180 MAC for Secure Download/Boot Operations
- FIPS 198 HMAC for Bidirectional Authentication and Optional GPIO Control
- Two GPIO Pins with Optional Authentication Control
- Open-Drain, 4mA/0.4V
- Optional SHA-256 or ECDSA Authenticated On/Off and State Read
- Optional Set On/Off after Multiblock Hash for Secure Boot/Download
- RNG with NIST SP 800-90B Compliant Entropy Source with Function to Read Out
- Optional Chip Generated Pr/Pu Key Pairs for ECC Operations
- 17-Bit One-Time Settable, Nonvolatile Decrement-Only Counter with Authenticated Read
- 8Kbits of EEPROM for User Data, Keys, and Certificates
- Unique and Unalterable Factory Programmed 64-Bit Identification Number (ROM ID)
- Optional Input Data Component to Crypto and Key Operations
- Single-Contact 1-Wire Interface Communication with Host at 11.7kbps and 62.5kbps
- Operating Range: 3.3V ±10%, -40°C to +85°C
- 6-Pin TDFN-EP Package (3mm x 3mm)
Applications/Uses
- Accessory and Peripheral Secure Authentication
- IoT Node Crypto-Protection
- Secure Boot or Download of Firmware and/or System Parameters
- Secure Storage of Cryptographic Keys for a Host Controller
Crypto Engine | Asymmetric Symmetric |
Applications | Access Control Asset Tracking IP Protection Identification Systems Medical Consumable ID Medical Sensor Authentication and Calibration PCB ID and Authentication Print Cartridge Authentication Printer Cartridge Configuration and Monitoring Rack Card Security Secure Access Control |
Bus Type | 1-Wire |
Memory Type | EEPROM |
Memory Size | 4K x 1 |
Deep Cover | Yes |
Oper. Temp. (°C) | -40 to +85 |
Package/Pins | TDFN/6 |
Budgetary Price (See Notes) | $1.19 @1k |
Technical Docs
Click any title below to view the detail page where available.
Description
The DS28E36 is a DeepCover® secure authenticator that provides a core set of cryptographic tools derived from integrated asymmetric (ECC-P256) and symmetric (SHA-256) security functions. In addition to the security services provided by the hardware implemented crypto engines, the device integrates a FIPS/NIST true random number generator (RNG), 8Kb of secured EEPROM, a decrement-only counter, two pins of configurable GPIO, and a unique 64-bit ROM identification number (ROM ID). This unique ROM ID is used as a fundamental input parameter for cryptographic operations and also serves as an electronic serial number within the application. The DS28E36 communicates over the single-contact 1-Wire® bus at overdrive speed. The communication follows the 1-Wire protocol with the ROM ID acting as node address in the case of a multidevice 1-Wire network.
The ECC public/private key capabilities operate from the NIST defined P-256 curve and include FIPS 186 compliant ECDSA signature generation and verification to support a bidirectional asymmetric key authentication model. The SHA-256 secret-key capabilities are compliant with FIPS 180 and are flexibly used either in conjunction with ECDSA operations or independently for multiple HMAC functions.
Two GPIO pins can be independently operated under command control and include configurability supporting authenticated and nonauthenticated operation including an ECDSA-based crypto-robust mode to support secure-boot of a host processor.
DeepCover embedded security solutions cloak sensitive data under multiple layers of advanced security to provide the most secure key storage possible. To protect against device-level security attacks, invasive and noninvasive countermeasures are implemented including active die shield, encrypted storage of keys, and algorithmic methods.
Features
- ECC-256 Compute Engine
- FIPS 186 ECDSA P256 Signature and Verification
- ECDH Key Exchange with Authentication Prevents Man-in-the-Middle Attacks
- ECDSA Authenticated R/W of Configurable Memory
- SHA-256 Compute Engine
- FIPS 180 MAC for Secure Download/Boot Operations
- FIPS 198 HMAC for Bidirectional Authentication and Optional GPIO Control
- Two GPIO Pins with Optional Authentication Control
- Open-Drain, 4mA/0.4V
- Optional SHA-256 or ECDSA Authenticated On/Off and State Read
- Optional Set On/Off after Multiblock Hash for Secure Boot/Download
- RNG with NIST SP 800-90B Compliant Entropy Source with Function to Read Out
- Optional Chip Generated Pr/Pu Key Pairs for ECC Operations
- 17-Bit One-Time Settable, Nonvolatile Decrement-Only Counter with Authenticated Read
- 8Kbits of EEPROM for User Data, Keys, and Certificates
- Unique and Unalterable Factory Programmed 64-Bit Identification Number (ROM ID)
- Optional Input Data Component to Crypto and Key Operations
- Single-Contact 1-Wire Interface Communication with Host at 11.7kbps and 62.5kbps
- Operating Range: 3.3V ±10%, -40°C to +85°C
- 6-Pin TDFN-EP Package (3mm x 3mm)
Description
The DS28E36 evaluation system (EV system) provides the hardware and software necessary to evaluate the DS28E36 and DS2476. The EV system consists of five DS28E36/DS2476 devices in a 6-pin TDFN package, a DS9121AQ+ evaluation TDFN socket board, and a DS9481P-300# USB-to-I2C/1-Wire® adapter. The evaluation software runs on Windows®10, Windows 8, and Windows 7 operating systems (64- and 32-bit versions). The EV system provides a handy user interface to exercise the features of the DS28E36 and DS2476.
View DetailsFeatures
- Demonstrates the Features of the DS28E36 DeepCover® Secure Authenticator
- Demonstrates the Features of the DS2476 DeepCover Secure Coprocessor
- I2C and 1-Wire Communication is Logged to Aid Firmware Designers Understanding of the DS2476 and DS28E36
- USB- I2C/1-Wire Adapter Creates a Virtual COM Port on Any PC
- Fully Compliant with USB Specification v2.0
- Software Runs on Windows 10, Windows 8, and Windows 7 for Both 64-Bit and 32-Bit Versions
- 3.3V ±3% 1-Wire Operating Voltage
- Convenient On-Board Test Points and TDFN Socket
- Evaluation Software Available by Request
- Proven PCB Layout
- Fully Assembled and Tested
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal
Parameters
Crypto Engine | Asymmetric Symmetric |
Applications | Access Control Asset Tracking IP Protection Identification Systems Medical Consumable ID Medical Sensor Authentication and Calibration PCB ID and Authentication Print Cartridge Authentication Printer Cartridge Configuration and Monitoring Rack Card Security Secure Access Control |
Bus Type | 1-Wire |
Memory Type | EEPROM |
Memory Size | 4K x 1 |
Deep Cover | Yes |
Oper. Temp. (°C) | -40 to +85 |
Package/Pins | TDFN/6 |
Budgetary Price (See Notes) | $1.19 @1k |
Key Features
- ECC-256 Compute Engine
- FIPS 186 ECDSA P256 Signature and Verification
- ECDH Key Exchange with Authentication Prevents Man-in-the-Middle Attacks
- ECDSA Authenticated R/W of Configurable Memory
- SHA-256 Compute Engine
- FIPS 180 MAC for Secure Download/Boot Operations
- FIPS 198 HMAC for Bidirectional Authentication and Optional GPIO Control
- Two GPIO Pins with Optional Authentication Control
- Open-Drain, 4mA/0.4V
- Optional SHA-256 or ECDSA Authenticated On/Off and State Read
- Optional Set On/Off after Multiblock Hash for Secure Boot/Download
- RNG with NIST SP 800-90B Compliant Entropy Source with Function to Read Out
- Optional Chip Generated Pr/Pu Key Pairs for ECC Operations
- 17-Bit One-Time Settable, Nonvolatile Decrement-Only Counter with Authenticated Read
- 8Kbits of EEPROM for User Data, Keys, and Certificates
- Unique and Unalterable Factory Programmed 64-Bit Identification Number (ROM ID)
- Optional Input Data Component to Crypto and Key Operations
- Single-Contact 1-Wire Interface Communication with Host at 11.7kbps and 62.5kbps
- Operating Range: 3.3V ±10%, -40°C to +85°C
- 6-Pin TDFN-EP Package (3mm x 3mm)
Applications/Uses
- Accessory and Peripheral Secure Authentication
- IoT Node Crypto-Protection
- Secure Boot or Download of Firmware and/or System Parameters
- Secure Storage of Cryptographic Keys for a Host Controller
Description
The ECC public/private key capabilities operate from the NIST defined P-256 curve and include FIPS 186 compliant ECDSA signature generation and verification to support a bidirectional asymmetric key authentication model. The SHA-256 secret-key capabilities are compliant with FIPS 180 and are flexibly used either in conjunction with ECDSA operations or independently for multiple HMAC functions.
Two GPIO pins can be independently operated under command control and include configurability supporting authenticated and nonauthenticated operation including an ECDSA-based crypto-robust mode to support secure-boot of a host processor.
DeepCover embedded security solutions cloak sensitive data under multiple layers of advanced security to provide the most secure key storage possible. To protect against device-level security attacks, invasive and noninvasive countermeasures are implemented including active die shield, encrypted storage of keys, and algorithmic methods.
Secure Boot and Secure Download -
Part 1: Protecting IoT Devices with Secure Authentication
Secure Boot and Secure Download -
Part 3: Using the DS28C36
Secure Boot and Secure Download -
Part 2: Technologies Behind Embedded Security
Technical Docs
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal