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High-Density Downstream Cable QAM Modulator and Digital Upconverter

Scalable DUC for DOCSIS 3.0-Compliant Edge QAM Devices Generates Up to 128 QAM Channels at 26mW/QAM

Product Details

The MAX5880 high-density downstream cable QAM modulator and digital upconverter (DUC) performs QAM mapping, pulse shaping, and digital RF upconversion of forward-error-correction (FEC)-encoded data with full agility. The device drives an RF digital-to-analog converter (RF-DAC) to digitally synthesize RF signals with up to 128 DOCSIS-compliant 6MHz QAM channels (or up to 96 8MHz QAM channels) on a single RF port. The DUC device and Maxim's RF-DACs provide high-density QAM modulation with very low power dissipation in a compact 17mm x 17mm footprint.

The device accepts FEC-encoded CMOS data (symbols) on up to four 10-bit input ports that accept up to 32 time-interleaved digital data streams each. Each channel features an individually configurable QAM mapper, RRC filter, and arbitrary rate resampler (ARR). The device performs pulse shaping, resampling, interpolation and quadrature modulation of input data, supporting all data rates defined in DOCSIS and DVB-C. A cascade of interpolation filters, complex modulators, and channel combiners allow modulation of the signal to any frequency from 45MHz to 1003MHz. Integrated direct digital frequency synthesizers allow positioning of the QAM channels with a resolution of 125Hz. The interpolation filters and resamplers provide linear phase and excellent gain flatness. Output data from the last modulator is fed to a digital-predistortion (DPD) block that can be used to correct distortion in the RF-DAC and output amplifiers. The output interface to the RF-DAC consists of four 14-bit interleaved LVDS buses that operate up to 1250Mwps each.

Key Features

  • High-Density: Scalable Up to 128 QAM Channels
    • Factory Preset for 8, 16, 24, 32, 48, 64, 96, or 128 QAM Channels
    • Soft-Key Field-Upgradeable in Steps of 8 QAMs
  • RRC Filters Support ITU-T J.83 Annex A, B, and C
  • 1MHz to 8MHz Channel Bandwidth
  • Full Carrier Agility within Each of Four 192MHz Blocks
    • Block Agility within 950MHz Output Bandwidth
  • Reconfigurable Without Service Interruption
  • DOCSIS 3.0 DRFI Compliant
  • Input Symbol Rate: 1Msym/s to 7.14Msym/s
    • Independently Set for Each Channel
  • Integrated QAM Mapper (16/32/64/128/256-QAM)
    • Supports All ITU-T J.83-Defined Constellations
  • Four CMOS Input Ports Support Up to 1024-QAM
  • Programmable Digital Predistortion
  • Four 14-Bit LVDS Output Ports Operate Up to 1250Mwps Each
    • Drives MAX5882 and MAX5879A RF-DACs
  • Low-Power Operation
    • 3.3W at 128 (6MHz) QAMs, fS = 4608Msps

Applications/Uses

  • Edge QAM, CMTS, and CCAP
  • QAM Modulators for Video Distribution

Design & Development

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Description

The MAX5880 evaluation kit (EV kit) contains the MAX5880 high-density downstream cable QAM modulator and digital upconverter (DUC). It is a fully assembled and tested PCB that contains all the components necessary for evaluating the DUC IC configured for up to 128 DOCSIS-compliant 6MHz QAM channels (or 96 EuroDOCSIS-compliant 8MHz QAM channels).
The EV kit provides two QSH Samtec connectors to interface to the high-speed data converter evaluation platform (HSDCEP), for driving the device's four multiplexed input ports and various control signals. Two QTH Samtec connectors are also provided to drive RF digital-to-analog converter (RF-DAC) EV kits, such as the MAX5882 EV kit and the MAX5879A EV kit.
The EV kit includes Windows XP®-, Windows Vista®-, and Windows® 7-compatible software that provide a simple graphical user interface (GUI) for configuration of the device registers, control of SPI interface, and for operation of the HSDCEP board (not compatible with Windows 7).
The EV kit and Maxim's direct RF-DAC EV kits provide a complete system solution for high-density QAM modulation with very low power dissipation.

View Details

Features

  • Evaluates the MAX5880 Up to 128 QAM Channels
  • Single 5.5V Input-Voltage Supply
  • Maximum 5Gsps Update Rate
  • Direct Interface with Maxim HSDCEP Data Source Board Using QSH Connectors (Order HSDCEP)
  • Direct Interface with MAX5882 or MAX5879A EV Kits
  • Windows XP-, Windows Vista-, and Windows 7-Compatible Software for SPI/I²C Interfaces
  • On-Board SPI Interface Control for MAX5880
  • On-Board I²C Interface Control for MAX6642 Temperature Sensor
  • GUI Controls for HSDCEP Operation
  • Pseudorandom Bit Sequence (PRBS) Test Pattern Files
  • Proven 14-Layer PCB Design
  • Fully Assembled and Tested

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Support & Training

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Parameters

Key Features

  • High-Density: Scalable Up to 128 QAM Channels
    • Factory Preset for 8, 16, 24, 32, 48, 64, 96, or 128 QAM Channels
    • Soft-Key Field-Upgradeable in Steps of 8 QAMs
  • RRC Filters Support ITU-T J.83 Annex A, B, and C
  • 1MHz to 8MHz Channel Bandwidth
  • Full Carrier Agility within Each of Four 192MHz Blocks
    • Block Agility within 950MHz Output Bandwidth
  • Reconfigurable Without Service Interruption
  • DOCSIS 3.0 DRFI Compliant
  • Input Symbol Rate: 1Msym/s to 7.14Msym/s
    • Independently Set for Each Channel
  • Integrated QAM Mapper (16/32/64/128/256-QAM)
    • Supports All ITU-T J.83-Defined Constellations
  • Four CMOS Input Ports Support Up to 1024-QAM
  • Programmable Digital Predistortion
  • Four 14-Bit LVDS Output Ports Operate Up to 1250Mwps Each
    • Drives MAX5882 and MAX5879A RF-DACs
  • Low-Power Operation
    • 3.3W at 128 (6MHz) QAMs, fS = 4608Msps

Applications/Uses

  • Edge QAM, CMTS, and CCAP
  • QAM Modulators for Video Distribution

Description

The MAX5880 high-density downstream cable QAM modulator and digital upconverter (DUC) performs QAM mapping, pulse shaping, and digital RF upconversion of forward-error-correction (FEC)-encoded data with full agility. The device drives an RF digital-to-analog converter (RF-DAC) to digitally synthesize RF signals with up to 128 DOCSIS-compliant 6MHz QAM channels (or up to 96 8MHz QAM channels) on a single RF port. The DUC device and Maxim's RF-DACs provide high-density QAM modulation with very low power dissipation in a compact 17mm x 17mm footprint.

The device accepts FEC-encoded CMOS data (symbols) on up to four 10-bit input ports that accept up to 32 time-interleaved digital data streams each. Each channel features an individually configurable QAM mapper, RRC filter, and arbitrary rate resampler (ARR). The device performs pulse shaping, resampling, interpolation and quadrature modulation of input data, supporting all data rates defined in DOCSIS and DVB-C. A cascade of interpolation filters, complex modulators, and channel combiners allow modulation of the signal to any frequency from 45MHz to 1003MHz. Integrated direct digital frequency synthesizers allow positioning of the QAM channels with a resolution of 125Hz. The interpolation filters and resamplers provide linear phase and excellent gain flatness. Output data from the last modulator is fed to a digital-predistortion (DPD) block that can be used to correct distortion in the RF-DAC and output amplifiers. The output interface to the RF-DAC consists of four 14-bit interleaved LVDS buses that operate up to 1250Mwps each.

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal