The DS26502 is a building-integrated timing-supply (BITS) clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, 64kHz composite clock (64KCC), and 6312kHz synchronization timing interfaces. In T1 and E1 modes, the Synchronization Status Message (SSM) can also be recovered. The transmit portion can directly interface to T1, E1, or 64KCC synchronization interfaces as well as source the SSM in T1 and E1 modes. The DS26502 can translate between any of the supported inbound synchronization clock rates to any supported outbound rate. A separate output is provided to source a 6312kHz clock. The device is controlled through a parallel, serial, or hardware controller port.