The MAX3991 has 7mVP-P input sensitivity (BER < 10-12), which allows direct connection to a transimpedance amplifier without the use of a stand-alone limiting amplifier. The phase-locked loop (PLL) is optimized for jitter tolerance and provides 0.6UI of high-frequency tolerance in SONET, Ethernet, and Fibre-Channel applications. The MAX3991 output provides 27% margin to the XFP eye mask specification.
An AC-based power detector toggles the loss-of-signal (LOS) output when the input signal swing is below the user-programmed assert threshold. An external reference clock, with frequency equal to 1/64 or 1/16 of the serial data rate is used to aid in frequency acquisition. A loss-of-lock (LOL) indicator is provided to indicate the lock status of the receiver PLL.
The MAX3991 is available in a 4mm x 4mm, 24-pin QFN package. It consumes 350mW from a single +3.3V supply and operates over the 0°C to +85°C temperature range.
|Device||Fab Process||Technology||Sample size||Rejects||FIT at 25°C||FIT at 55°C|
|App Note||3766||HFTA-12.0: Measuring Crosstalk Penalty in High-Speed Bidirectional Serial Communication Modules|
|Reference Schematic||3540||HFRD-18.0: High-Frequency XFP Host Board|
|App Note||3432||MAX3991: Accurate Loss-of-Signal Detection in 10Gbps Optical Receivers using the MAX3991|