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1.0625Gbps to 10.32Gbps, Integrated, Low-Power SFP+ Limiting Amplifier and VCSEL Driver

Industry's First Combination VCSEL Driver and Limiting Amp for 10G SFP+ Ethernet and Fibre Channel

Product Details

Key Features

Simplified Block Diagram

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Key Features

  • Low Power Dissipation of 320mW at 3.3V Power Supply
  • Up to 10.32Gbps (NRZ) Operation
  • 3mVP-P Receiver Sensitivity at 10.32Gbps
  • 4psP-P DJ at Receiver Output at 8.5Gbps 8B/10B
  • 4psP-P DJ at Receiver Output at 10.32Gbps 231 - 1 PRBS
  • 26ps Rise and Fall Time at Rx/Tx Output
  • Mode Select for High-Gain Mode and High-Bandwidth Mode
  • CML Output Slew-Rate Adjustment for High-Gain Mode
  • CML Output with Continuous Level Adjustment
  • CML Output Squelch
  • Polarity Select for Rx and Tx
  • LOS Assert Level Adjustment
  • LOS Polarity Select
  • Modulation Current Up to 12mA Into 100Ω Differential Load
  • Bias Current Up to 15mA
  • Integrated Eye Safety Features
  • Selectable Deemphasis at Rx Output
  • 3-Wire Digital Interface
  • Eye-Crossing Adjustment of Modulation Output
  • Programmable Deemphasis at Tx Output
  • Fast Mode-Select Change Time of 10µs

Applications/Uses

  • 10GBASE-LR SFP+ Optical Transceiver (1310nm VCSEL)
  • 10GBASE-LRM SFP+ Optical Transceiver (1310nm VCSEL)
  • 10GBASE-SR SFP+ Optical Transceiver
  • 1x/2x/4x/8x SFF/SFP/SFP+ MSA Fibre Channel (FC) Optical Transceiver

Description

The MAX3798 is a highly integrated limiting amplifier and VCSEL driver designed for 1x/2x/4x/8x Fibre Channel transmission systems at data rates up to 8.5Gbps as well as for 10GBASE-SR transmission systems at a data rate of 10.3125Gbps. Operating from a single +3.3V supply, this low-power integrated limiting amplifier and VCSEL driver IC enables a platform design for SFP MSA as well as for SFP+ MSA-based optical transceivers. The high-sensitivity limiting amplifier limits the differential input signal generated by a transimpedance amplifier into a CML-level differential output signal. The compact VCSEL driver provides a modulation and a bias current for a VCSEL diode. The optical average power is controlled by an average power control (APC) loop implemented by a controller that interfaces to the VCSEL driver through a 3-wire digital interface. All differential I/Os are optimally back-terminated for a 50Ω transmission line PCB design.

The use of a 3-wire digital interface reduces the pin count while enabling advanced Rx (mode selection, LOS threshold, LOS squelch, LOS polarity, CML output level, signal path polarity, slew-rate control, deemphasis, and fast mode-select change time) and Tx settings (modulation current, bias current, polarity, programmable deemphasis, eye-crossing adjustment, and eye safety control) without the need for external components. The MAX3798 provides multiple current and voltage DACs to allow the use of low-cost controller ICs.

The MAX3798 is packaged in a lead-free, 5mm x 5mm, 32-pin TQFN package.

Simplified Block Diagram

MAX3798: Typical Application Circuit MAX3798: Typical Application Circuit Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.