MAX3676

622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier

High-Performance, Low-Power 622Mbps CDR


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Description

The MAX3676 is a complete clock-recovery and data-retiming IC incorporating a limiting amplifier. It is intended for 622Mbps SDH/SONET applications and operates from a single +3.3V supply.

The MAX3676 is designed for both section-regenerator and terminal-receiver applications in OC12/STM-4 transmission systems. Its jitter performance exceeds all SONET/SDH specifications.

The MAX3676 has two differential input amplifiers: one accepts positive-referenced emitter-coupled logic (PECL) levels, while the other accepts small-signal analog levels. The analog inputs access the limiting amplifier stage, which provides both a received-signal-strength indicator (RSSI) and a programmable-threshold loss-of-power (LOP) monitor. Selecting the PECL amplifier disables the limiting amplifier, conserving power. A loss-of-lock (LOL) monitor is also incorporated as part of the fully integrated phase-locked loop (PLL).
MAX3676: Typical Operating Circuit MAX3676: Typical Operating Circuit Enlarge+

Key Features

  • Single +3.3V or +5.0V Power Supply
  • Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications
  • Low Power: 237mW at +3.3V
  • Selectable Data Inputs, Differential PECL or Analog
  • Received-Signal-Strength Indicator
  • Loss-of-Power and Loss-of-Lock Monitors
  • Differential PECL Clock and Data Outputs
  • No External Reference Clock Required

Applications/Uses

  • Add/Drop Multiplexers
  • ATM Switches
  • Digital Cross-Connects
  • SDH/SONET Access Nodes
  • SDH/SONET Receivers and Regenerators
Product Reliability Reports: MAX3676.pdf 
Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C   Material Composition  

Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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