DS4830

Optical Microcontroller

Rich Optical Feature Set Eases Controller Implementation in High-Performance Optical Transceivers


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Description

The DS4830 provides a complete optical control, calibration, and monitor solution based on a low-power, 16-bit, microcontroller core, providing program and RAM data memory. I/O resources include a fast/accurate analog-to-digital converter (ADC), fast comparators with an internal comparison digital-to-analog converter (DAC), 12-bit DACs, 12-bit PWMs, internal and external temperature sensors, fast sample/hold, I2C slave host interface, and a multiprotocol serial master/slave interface.

Direct connection of diode-connected transistors, used as remote temperature sensors, is supported as well as expansion to additional external digital temperature sensor ICs using the on-chip master I2C interface. An independent slave I2C interface facilitates communication to a host microprocessor in addition to password-protected in-system reprogramming of the on-chip flash.

Firmware development is supported by third-party highly versatile C-compilers and development software that programs flash and performs in-circuit debug through the integrated JTAG interface and associated hardware.

DS4830: Typical Application Circuit DS4830: Typical Application Circuit Enlarge+

Key Features

  • 16-Bit Low-Power Microcontroller
  • 36 kWords Total Program Memory
    • 32 kWords Flash Program Memory
    • 4 kWords ROM Program Memory
  • 1 kWords Data RAM
  • 8 DAC Channels
    • 12-Bit Buffered Voltage DACs
    • Internal or External Reference
  • 10 PWM Channels
    • Boost/Buck DC-DC Control with Support for 7-Bit to 12-Bit Resolution and 1MHz Switching Frequency
    • Supports 4-Channel TECC H-Bridge Control
  • 8-Bit Fast Comparator with 16-Input Mux
    • 1.6µs per Comparison
  • 13-Bit A/D Converter with 26-Input Mux (27ksps)
  • Temperature Measurement Analog Front-End
    • Internal Temperature Sensor, &plusnm;3°C
    • 0.0625°C Resolution
    • Supports Two External Temperature Sensors
    • Differential Rail-Rail Inputs
  • 31 GPIO Pins
  • Maskable Interrupt Sources
  • Internal 20MHz Oscillator, CPU Core Frequency 10MHz
    • 4% Accurate from 0°C to +50°C
  • Up to 133MHz External Clock for PWM and Timers
  • Slave Communication Interface: SPI or 400kHz I2C-Compatible 2-Wire
  • Master Communication Interface: SPI, 400kHz I2C-Compatible, or Maxim 3-Wire Laser Driver
  • I2C and JTAG Bootloader
  • Two 16-Bit Timers
  • 2.97V to 3.63V Operating Voltage Range
  • Brownout Monitor
  • JTAG Port with In-System Debug and Programming
  • Low Power Consumption (16mA) with All Analog Active

Applications/Uses

  • Optical Transceivers: XFP, SFP, SFP+, QSFP, 40G, 100G
  • PON Diplexers and Triplexers: GPON, 10GEPON, XPON OLT, ONU

See parametric specs for Fiber Monitoring and Control (14)


Part NumberADCsResolution
(bits)
DACs/ ResistorsFS Out
(kΩ)
StepsTemp. SensorMemoryVSUPPLY
(V)
Control InterfacePackage/PinsBudgetary
Price
See Notes
DS4830 18-Input Muxable13
2 DACs
8 DACs
NoneNoneInternalProgram3.0 to 3.6
I2C
JTAG Bootloader
TQFN/40
$3.15 @1k

See parametric specs for Microcontrollers (57)


Part NumberMCU CoreCore Clock Speed
(MHz)
Data ProcessingInternal Flash
(KBytes)
Internal SRAM
(KBytes)
SPI BusI2C BusGPIO PinsPWMTimer FeaturesPackage/Pins
maxmax
DS4830 MAXQ201016-bit32121 Master, 1 Slave3110Brownout Monitor
See Data Sheet

Pricing Notes:
This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific and version-specific prices and delivery, please see the price and availability page or contact an authorized distributor.
Product Reliability Reports: DS4830.pdf 
Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C   Material Composition  

Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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