These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. TDM data is transported in up to 64 individually configurable bundles. All standards-based TDM-over-packet mapping methods are supported except AAL2. Frame-based serial HDLC data flows are also supported. The high level of integration available with the DS34S10x devices minimizes cost, board space, and time to market.
Transport of E1, T1, E3, T3 or STS-1 TDM or CBR Serial Signals Over Packet Networks
Full Support for These Mapping Methods: SAToP, CESoPSN, TDMoIP (AAL1), HDLC, Unstructured, Structured, Structured with CAS
Adaptive Clock Recovery, Common Clock, External Clock and Loopback Timing Modes
On-Chip TDM Clock Recovery Machines, One Per Port, Independently Configurable
Clock Recovery Algorithm Handles Network PDV, Packet Loss, Constant Delay Changes, Frequency Changes and Other Impairments
Electronics in Vehicles (ELIV) 2019 10/16/2019 - 10/17/2019, Bonn, Germany The international VDI Congress ELIV (Electronics In Vehicles) is THE event for all experts in the field of electrical and electronical car engineering and integration of mechanical and electronical systems.
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