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6-/8-/12-Port DS3/E3/STS-1 LIU

Less than 170mW/Port in a Small, 23mm x 23mm BGA

Product Details

Key Features

Simplified Block Diagram

Technical Docs

Data Sheet 6-/8-/12-Port DS3/E3/STS-1 LIU Nov 11, 2008

Support & Training

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Sampling:
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Key Features

  • Pin-Compatible Family of Products
  • Each Port Independently Configurable
  • Receive Clock and Data Recovery for Up to 457 meters (1500 feet) of 75Ω Coaxial Cable
  • Standards-Compliant Transmit Waveshaping
  • Uses 1:1 Transformers on Both Tx and Rx
  • Three Control Interface Options: 8/16-Bit Parallel, SPI, and Hardware Mode
  • Jitter Attenuators (One Per Port) Can be Placed in the Receive Path or the Transmit Path
  • Jitter Attenuators Have Provisionable Buffer Depth: 16, 32, 64, or 128 Bits
  • Built-In Clock Adapter Generates All Line-Rate Clocks from a Single Input Clock (DS3, E3, STS-1, 12.8MHz, 19.44MHz, 38.88MHz, 77.76MHz)
  • Per-Port Programmable Internal Line Termination Requiring Only External Transformers
  • High-Impedance Tx and Rx, Even When VDD = 0, Enables Hot-Swappable, 1:1 and 1+1 Board Redundancy Without Relays
  • Per-Port BERT for PRBS and Repetitive Pattern Generation and Detection
  • Tx and Rx Open and Short Detection Circuitry
  • Transmit Driver Monitor Circuitry
  • Receive Loss-of-Signal (LOS) Monitoring Compliant with ANSI T1.231 and ITU G.775
  • Automatic Data Squelching on Receive LOS
  • Large Line Code Performance-Monitoring Counters for Accumulation Intervals Up to 1s
  • Local and Remote Loopbacks
  • Transmit Common Clock Option
  • Power-Down Capability for Unused Ports
  • Low-Power 1.8V/3.3V Operation (5V Tolerant I/O)
  • Industrial Temperature Range: -40°C to +85°C
  • Small Package: 23mm x 23mm, 484-Pin BGA
  • IEEE 1149.1 JTAG Support

Applications/Uses

  • Access Concentrators
  • ATM and Frame Relay Equipment
  • CSUs/DSUs
  • Digital Cross-Connects
  • DSLAMs
  • PBXs
  • SONET/SDH and PDH Multiplexers

Description

The DS32506 (6 port), DS32508 (8 port), and DS32512 (12 port) line interface units (LIUs) are highly integrated, low-power, feature-rich LIUs for DS3, E3, and STS-1 applications. Each LIU port in these devices has independent receive and transmit paths, a jitter attenuator, full-featured pattern generator and detector, performance-monitoring counters, and a complete set of loopbacks. An on-chip clock adapter generates all line-rate clocks from a single input clock. Ports are independently software configurable for DS3, E3, and STS-1 and can be individually powered down. Control interface options include 8-bit parallel, SPI™, and hardware mode.

Simplified Block Diagram

DS32506, DS32508, DS32512: Typical Operating Circuit DS32506, DS32508, DS32512: Typical Operating Circuit Zoom icon

Technical Docs

Data Sheet 6-/8-/12-Port DS3/E3/STS-1 LIU Nov 11, 2008

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.