Single/Dual/Triple/Quad ATM/Packet PHYs for DS3/E3/STS-1

Please check latest availability status for a specific part variant.


The DS3161, DS3162, DS3163, and DS3164 (DS316x) integrate ATM cell/HDLC packet processor(s) with DS3/E3 framer(s) to map/demap ATM cells or packets into as many as four DS3/E3 digital lines with DS3-framed, E3-framed, or clear- channel data streams on per-port basis.
DS3161, DS3162, DS3163, DS3164: Functional Diagram DS3161, DS3162, DS3163, DS3164: Functional Diagram Enlarge+

Key Features

  • Single (DS3161), Dual (DS3162), Triple (DS3163), or Quad (DS3164) ATM/Packet PHYs for DS3, E3, and Clear-Channel 52Mbps (CC52)
  • Pin Compatible for Ease of Port Density Migration in the Same PC Board Platform
  • Each Port Independently Configurable
  • Universal PHYs Map ATM Cells and/or HDLC Packets into DS3 or E3 Data Streams
  • UTOPIA L2/L3 or POS-PHY™ L2/L3 or SPI-3 Interface with 8-, 16-, or 32-Bit Bus Width
  • 66MHz UTOPIA L3 and POS-PHY L3 Clock
  • 52MHz UTOPIA L2 and POS-PHY L2 Clock
  • Ports Independently Configurable for Cell or Packet Traffic in POS-PHY Bus Modes
  • Direct, PLCP, DSS, and Clear-Channel Cell Mapping
  • Direct and Clear-Channel Packet Mapping
  • On-Chip DS3 (M23 or C-Bit) and E3 (G.751 or G.832) Framer(s)
  • Ports Independently Configurable for DS3, E3 (Full or Subrate) or Arbitrary Framing Protocols Up to 52Mbps
  • Programmable (Externally Controlled or Internally Finite State Machine Controlled) Subrate DS3/E3


  • Access Concentrators
  • ATM and Frame Relay Equipment
  • Digital Cross-Connects
  • Integrated Access Device (IAD)
  • Multiservice Access Platform (MSAP)
  • Multiservice Protocol Platform (MSPP)
  • PBXs
  • PDH Multiplexer/Demultiplexer
  • Routers/Switches
  • SONET/SDH Muxes
  • Test Equipment

Technical Documents

App Note 3609 Clock-Rate-Adapter (CLAD) Features for DS325X, DS316X, DS317X, and DS318X

Quality and Environmental Data

Product Reliability Reports: DS3162.pdf 
Lead-Free Package Tin (Sn) Whisker Reports
Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C  

Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

Quality Management System >
Environmental Management System >


Related Resources

Belle Isle 2020
05/29/2020 - 05/31/2020, Detroit, MI
2020 Detroit Grand Prix - Chevrolet Detroit Grand Prix presented by Lear Fast Facts The Chevrolet Detroit Grand Prix presented by Lear was hosted on Belle Isle, May 29 - 30 2020. The event featured the cars of the NTT IndyCar Series, the IMSA WeatherTech SportsCar Championship and the Trans Am Series presented by Pirelli. The weekend is collectively referred to as the Chevrolet Detroit Grand Prix presented by Lear and it once again featured the Chevrolet Dual in Detroit IndyCar doubleheader.