DS2188

T1/CEPT Jitter Attenuator


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Description

The DS2188 T1/CEPT jitter attenuator chip contains a 128 x 2-bit buffer that, in conjunction with an external 4X crystal, is used to attenuate the incoming jitter present in clock and data. The device meets all of the latest applicable specifications including those outlined in TR62411 (Accunet T1.5 Service Description and Interface Specifications, December 1990), TR-TSY-000170 (Digital Cross-Connect System Requirements and Objectives, November 1985), and the CCITT recommendations G.735 and G.742. The DS2188 is compatible with the DS2180A T1/ISDN primary rate transceiver and DS2181A CEPT transceiver, and is the companion to the DS2187 T1/CEPT receive line interface and DS2186 T1/CEPT transmit line interface. It can also be used in conjunction with the DS2190 T1 network interface unit.

Key Features

  • Attenuates clock and data jitter present in T1 or CEPT lines
  • Meets the jitter attenuation templates outlined in TR62411, TR-TSY-000170, G.735, and G.742
  • Only one external component required; either a 6.176MHz (T1) or 8.192MHz (CEPT) crystal
  • Selectable buffer size of 128 bits or 32 bits
  • Jitter attenuation is easily disabled
  • Single +5V supply; low-power CMOS technology
  • Available in 16-pin DIP and 16-pin SO (DS2188S)
  • Companion to the DS2186 transmit line and DS2187 receive line interface
Product Reliability Reports: DS2188.pdf 
Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C   Material Composition  

Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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