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3.3V, 16-Bit, 200Msps High Dynamic Performance DAC with CMOS Inputs

Product Details

Key Features

Parametric specs for High-Speed DACs (≥ 1MHz)
Resolution (bits) 16
# Channels 1
fCLK (Msps) 200
SFDR (dBc) (@ fOUT) 76 @ 16MHz
DNL (±LSB) 2
INL (±LSB) 3.9
PDISS (mW) 135
Interface Parallel
VSUPPLY (V) 3.3
Package/Pins QFN/48
Budgetary
Price (See Notes)
20.69
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Simplified Block Diagram

Technical Docs

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Parameters

Parametric specs for High-Speed DACs (≥ 1MHz)
Resolution (bits) 16
# Channels 1
fCLK (Msps) 200
SFDR (dBc) (@ fOUT) 76 @ 16MHz
DNL (±LSB) 2
INL (±LSB) 3.9
PDISS (mW) 135
Interface Parallel
VSUPPLY (V) 3.3
Package/Pins QFN/48
Budgetary
Price (See Notes)
20.69

Key Features

  • 200Msps Output Update Rate
  • Single 3.3V Supply Operation
  • Excellent SFDR and IMD Performance
    • SFDR = 77dBc at fOUT = 10MHz (to Nyquist)
    • IMD = -88dBc at fOUT = 10MHz
    • ACLR = 74dB at fOUT = 30.72MHz
  • 2mA to 20mA Full-Scale Output Current
  • CMOS-Compatible Digital and Clock Inputs
  • On-Chip 1.2V Bandgap Reference
  • Low Power Dissipation
  • 48-Pin QFN-EP Package

Applications/Uses

  • Automated Test Equipment (ATE)
  • Base Stations: Single-/Multicarrier UMTS, CDMA, GSM
  • Communications: LMDS, MMDS, Point-to-Point Microwave
  • Digital-Signal Synthesis
  • Instrumentation

Description

The MAX5885 is an advanced, 16-bit, 200Msps digital to-analog converter (DAC) designed to meet the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from a single 3.3V supply, this DAC offers exceptional dynamic performance such as 77dBc spurious-free dynamic range (SFDR) at fOUT = 10MHz. The DAC supports update rates of 200Msps at a power dissipation of less than 200mW.

The MAX5885 utilizes a current-steering architecture, which supports a full-scale output current range of 2mA to 20mA, and allows a differential output voltage swing between 0.1VP-P and 1VP-P.

The MAX5885 features an integrated 1.2V bandgap reference and control amplifier to ensure high accuracy and low noise performance. Additionally, a separate reference input pin enables the user to apply an external reference source for optimum flexibility and to improve gain accuracy.

The digital and clock inputs of the MAX5885 are designed for CMOS-compatible voltage levels. The MAX5885 is available in a 48-pin QFN package with an exposed paddle (EP) and is specified for the extended industrial temperature range (-40°C to +85°C).

See a parametric table of the complete family of pin-compatible, 12-/14-/16-bit high-speed DACs.

Simplified Block Diagram

MAX5885: Block Diagram MAX5885: Block Diagram Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.