Simplified Block Diagram
- Evaluates the MAX5882
- 4.6Gsps Maximum Update Rate
- Proven 12-Layer PCB Design
- Single-Ended Clock Interface
- 2.3GHz Maximum Clock Rate
- Single-Ended DAC Output Interface
- Wideband Output Transformer
- Supports from 50MHz to >2GHz
- On-Board 1.25V Reference Circuitry
- On-Board Divide-by-Two Data Clock Divider
- Reduces Frequency for Use with FPGA/ASIC
- Fully Assembled and Tested
- Broadcast Video Modulators
- Cable Modem Termination Systems (CMTS)
- DOCSIS-Compliant Edge QAM Devices
- Video-on-Demand (VOD)
The MAX5882 evaluation kit (EV kit) contains a single MAX5882 14-Bit, 4.6Gsps cable downstream, direct RF synthesis digital-to-analog converter (DAC). The evaluation board includes a transformer circuit used to convert the differential DAC output to a single-ended 50Ω signal. An on-board, 3-transformer circuit is also provided to convert a single-ended 50Ω clock source into the well balanced, 50% duty cycle, 100Ω differential source required by the MAX5882.
The MAX5882 evaluation board employs two SAMTECH Q Strip® (QSH) connectors for the digital interface. The EV kit includes an adapter board that converts the QSH interface to an FPGA Mezzanine Connector (FMC). The FMC connector is commonly available on Commercial Off-the-Shelf (COTS) FPGA evaluation boards, such as the Xilinx© Virtex®-7 VC707 EV kit.
The MAX5882 EV kit is supported by the MUXDAC Data Source based on a VC707 FPGA board which provides a useful tool for supplying the digital signals required to evaluate the MAX5882. Refer to the MUXDAC Data Source User’s Guide for more information.