Top

14-Bit, 200Msps, High-Dynamic-Performance, Dual DAC with CMOS Inputs

Product Details

Key Features

Parametric specs for High-Speed DACs (≥ 1MHz)
Resolution (bits) 14
# Channels 2
fCLK (Msps) 200
SFDR (dBc) (@ fOUT) 78 @ 16MHz
DNL (±LSB) 0.7
INL (±LSB) 1
PDISS (mW) 260
Interface Parallel
VSUPPLY (V) 3.3
Package/Pins QFN/68
Budgetary
Price (See Notes)
15.57
View Less

Simplified Block Diagram

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Parameters

Parametric specs for High-Speed DACs (≥ 1MHz)
Resolution (bits) 14
# Channels 2
fCLK (Msps) 200
SFDR (dBc) (@ fOUT) 78 @ 16MHz
DNL (±LSB) 0.7
INL (±LSB) 1
PDISS (mW) 260
Interface Parallel
VSUPPLY (V) 3.3
Package/Pins QFN/68
Budgetary
Price (See Notes)
15.57

Key Features

  • 200Msps Output Update Rate
  • Noise Spectral Density = -160dBFS/Hz at fOUT = 16MHz
  • Excellent SFDR and IMD Performance
    • SFDR = 78dBc at fOUT = 16MHz (to Nyquist)
    • SFDR = 74dBc at fOUT = 80MHz (to Nyquist)
    • IMD = -86dBc at fOUT = 10MHz
    • IMD = -74dBc at fOUT = 80MHz
  • ACLR = 75dB at fOUT = 61MHz
  • 2mA to 20mA Full-Scale Output Current
  • CMOS-Compatible Digital and Clock Inputs
  • On-Chip 1.2V Bandgap Reference
  • Low 260mW Power Dissipation
  • 68-Lead QFN-EP Package
  • Evaluation Kit Available (MAX5874EVKIT)

Applications/Uses

  • Automated Test Equipment (ATE)
  • Base Stations: Single-/Multicarrier UMTS, CDMA, GSM
  • Cable Modem Termination Systems (CMTS)
  • Communications: Fixed Broadband Wireless Access, Point-to-Point Microwave
  • Direct Digital Synthesis (DDS)
  • Instrumentation

Description

The MAX5874 is an advanced 14-bit, 200Msps, dual digital-to-analog converter (DAC). This DAC meets the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from 3.3V and 1.8V supplies, this dual DAC offers exceptional dynamic performance such as 78dBc spurious-free dynamic range (SFDR) at fOUT = 16MHz and supports update rates of 200Msps, with a power dissipation of only 260mW.

The MAX5874 utilizes a current-steering architecture that supports a 2mA to 20mA full-scale output current range, and allows a 0.1VP-P to 1VP-P differential output voltage swing. The device features an integrated 1.2V bandgap reference and control amplifier to ensure high-accuracy and low-noise performance. A separate reference input (REFIO) allows for the use of an external reference source for optimum flexibility and improved gain accuracy.

The digital and clock inputs of the MAX5874 accept 3.3V CMOS voltage levels. The device features a flexible input data bus that allows for dual-port input or a single-interleaved data port. The MAX5874 is available in a 68-pin QFN package with an exposed paddle (EP) and is specified for the extended temperature range (-40°C to +85°C).

Refer to the MAX5873 and MAX5875 data sheets for pin-compatible 12-bit and 16-bit versions of the MAX5874, respectively. Refer to the MAX5877 for an LVDS-compatible version of the MAX5874.

See a parametric table of the complete family of pin-compatible 12-/14-/16-bit high-speed DACs.

Simplified Block Diagram

MAX5874: Pin Configuration MAX5874: Pin Configuration Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .