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Dual, 10-Bit, 80Msps, Current-Output DAC

Product Details

Key Features

Applications/Uses

Parametric specs for High-Speed DACs (≥ 1MHz)
Resolution (bits) 10
# Channels 2
fCLK (Msps) 80
SFDR (dBc) (@ fOUT) 78 @ 10MHz
THD (dBc) (@ fOUT) -76 @ 10MHz
DNL (±LSB) 0.2
INL (±LSB) 0.25
PDISS (mW) 173
Interface Parallel
VSUPPLY (V) 3.3
Package/Pins TQFN/40
Budgetary
Price (See Notes)
7.81
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Simplified Block Diagram

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Parameters

Parametric specs for High-Speed DACs (≥ 1MHz)
Resolution (bits) 10
# Channels 2
fCLK (Msps) 80
SFDR (dBc) (@ fOUT) 78 @ 10MHz
THD (dBc) (@ fOUT) -76 @ 10MHz
DNL (±LSB) 0.2
INL (±LSB) 0.25
PDISS (mW) 173
Interface Parallel
VSUPPLY (V) 3.3
Package/Pins TQFN/40
Budgetary
Price (See Notes)
7.81

Key Features

  • 10-Bit, 80Msps Dual DAC
  • Low Power
    • 77mW with IFS = 5mA at fCLK = 80MHz
  • 2.7V to 3.6V Single Supply
  • Full Output Swing and Dynamic Performance at 2.7V Supply
  • Superior Dynamic Performance
    • 78dBc SFDR at fOUT = 20MHz
  • Programmable Channel Gain Matching
  • Integrated 1.24V Low-Noise Bandgap Reference
  • Single-Resistor Gain Control
  • Interleaved Data Mode
  • Single-Ended and Differential Clock Input Modes
  • Miniature 40-Pin Thin QFN Package, 6mm x 6mm
  • EV Kit Available MAX5854 EV Kit

Applications/Uses

  • Communications SatCom, LMDS, MMDS, HFC, DSL, WLAN, Point-to-Point Microwave Links
  • Direct Digital Synthesis (DDS)
  • Instrumentation/ATE
  • Quadrature Modulation
  • Wireless Base Stations

Description

The MAX5853 dual, 10-bit, 80Msps digital-to-analog converter (DAC) provides superior dynamic performance in wideband communication systems. The device integrates two 10-bit DAC cores, and a 1.24V reference. The converter supports single-ended and differential modes of operation. The MAX5853 dynamic performance is maintained over the entire 2.7V to 3.6V power-supply operating range. The analog outputs support a -1.0V to +1.25V compliance voltage.

The MAX5853 can also operate in interleave data mode to reduce the I/O pin count. This allows the converter to be updated on a single, 10-bit bus.

The MAX5853 features digital control of channel gain matching to within ±0.4dB in sixteen 0.05dB steps. Channel matching improves sideband suppression in analog quadrature modulation applications. The on-chip 1.24V bandgap reference includes a control amplifier that allows external full-scale adjustments of both channels through a single resistor. The internal reference can be disabled and an external reference may be applied for high-accuracy applications.

The MAX5853 features full-scale current outputs of 2mA to 20mA and operates from a 2.7V to 3.6V single supply. The DAC supports three modes of power-control operation: normal, low-power standby, and complete power-down. In power-down mode, the operating current is reduced to 1µA.

The MAX5853 is packaged in a 40-pin thin QFN with exposed paddle (EP) and is specified for the extended (-40°C to +85°C) temperature range.

Pin-compatible, higher speed, and lower resolution versions are also available. Refer to the MAX5854 (10-bit, 165Msps), the MAX5852 (8-bit, 165Msps), and the MAX5851 (8-bit, 80Msps) data sheets for more information. See Table 4 at the end of the data sheet.

Simplified Block Diagram

MAX5853: Simplified Diagram MAX5853: Simplified Diagram Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .