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Quad, Serial, 8-Bit DACs with Rail-to-Rail Outputs

Quad, Serial, Voltage-Output DACs in a SSOP Package

Product Details

Key Features

Parametric specs for Precision DACs (< 1MHz)
Resolution (bits) 8
# Channels 4
Interface Serial - SPI
Output Type Voltage- Buffered
Reference Ext.
INL (±LSB) (max) 1
Supply Range (V) (min) -5.5
Supply Range (V) (max) 5.5
ICC (mA) (max) 12
Settling Time (µs) (typ) 6
Package/Pins PDIP/20
SOIC (W)/20
SSOP/20
Oper. Temp. (°C) -55 to +125
-40 to +85
0 to +70
Budgetary
Price (See Notes)
7.95
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Simplified Block Diagram

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Parameters

Parametric specs for Precision DACs (&lt; 1MHz)
Resolution (bits) 8
# Channels 4
Interface Serial - SPI
Output Type Voltage- Buffered
Reference Ext.
INL (±LSB) (max) 1
Supply Range (V) (min) -5.5
Supply Range (V) (max) 5.5
ICC (mA) (max) 12
Settling Time (µs) (typ) 6
Package/Pins PDIP/20
SOIC (W)/20
SSOP/20
Oper. Temp. (°C) -55 to +125
-40 to +85
0 to +70
Budgetary
Price (See Notes)
7.95

Key Features

  • Single +5V or Dual ±5V Supply Operation
  • Output Buffer Amplifiers Swing Rail-to-Rail
  • Reference Input Range Includes Both Supply Rails
  • Calibrated Offset, Gain, and Linearity (1 LSB TUE)
  • 10MHz Serial Interface, Compatible with SPI, QSPI (CPOL = CPHA = 0) and Microwire
  • Double-Buffered Registers for Synchronous Updating
  • Serial Data Output for Daisy-Chaining
  • Power-On Reset Clears Serial Interface and Sets All Registers to Zero

Applications/Uses

  • Digital Attenuator
  • Digital Gain and Offset Control
  • General Purpose

Description

The MAX509/MAX510 are quad, serial-input, 8-bit voltage-output digital-to-analog converters (DACs). They operate with a single +5V supply or dual ±5V supplies. Internal, precision buffers swing rail-to-rail. The reference input range includes both supply rails.

The MAX509 has four separate reference inputs, allowing each DAC's full-scale range to be set independently. 20-pin DIP, SSOP, and SO packages are available. The MAX510 is identical to the MAX509 except it has two reference inputs, each shared by two DACs. The MAX510 is housed in space-saving 16-pin DIP and SO packages.

The serial interface is double-buffered: A 12-bit input shift register is followed by four 8-bit buffer registers and four 8-bit DAC registers. A 12-bit serial word is used to load data into each register. Both input and DAC registers can be updated independently or simultaneously with single software commands. Two additional asynchronous control pins provide simultaneous updating (active-low LDAC) or clearing (active-low CLR) of input and DAC registers.

The interface is compatible with Microwire™ and SPI™/QSPI™. All digital inputs and outputs are TTL/CMOS compatible. A buffered data output provides for readback or daisy-chaining of serial devices.

Simplified Block Diagram

MAX509, MAX510: Functional Diagram MAX509, MAX510: Functional Diagram Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .