Product Details
Key Features
Applications/Uses
Gate Drive Range (V) | 0.1 to AVDD-0.1 |
VBIAS Clamp | Yes |
# Channels | 2 |
High-Side Current Sense Gain | 2 @ 32V |
Loop Control | Internal LUTs |
Lookup Table Index | Temperature Voltage |
Lookup Table Memory | Nonvolatile |
Interface | I2C SPI |
ADCs | 12-bit |
DACs | 12-bit |
Reference | External Internal |
Temp. Sensor | External Internal |
AVDD (V) (min) | 5.25 |
DVDD (V) (min) | 5.25 |
Package/Pins | TQFN HYBRID/48 |
Budgetary Price (See Notes) | 9.24 |
Simplified Block Diagram
Technical Docs
Data Sheet | Dual RF LDMOS Bias Controller with Nonvolatile Memory | Dec 08, 2008 | |
App Note | Implementing a MAX1385-Based Control Loop in C/C++ |
Support & Training
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Parameters
Gate Drive Range (V) | 0.1 to AVDD-0.1 |
VBIAS Clamp | Yes |
# Channels | 2 |
High-Side Current Sense Gain | 2 @ 32V |
Loop Control | Internal LUTs |
Lookup Table Index | Temperature Voltage |
Lookup Table Memory | Nonvolatile |
Interface | I2C SPI |
ADCs | 12-bit |
DACs | 12-bit |
Reference | External Internal |
Temp. Sensor | External Internal |
AVDD (V) (min) | 5.25 |
DVDD (V) (min) | 5.25 |
Package/Pins | TQFN HYBRID/48 |
Budgetary Price (See Notes) | 9.24 |
Key Features
- On-Chip 4Kb EEPROM for Storing LDMOS Bias Characteristics
- Integrated High-Side Current-Sense PGA with Gain of 2, 10, or 25
- ±0.75% Accuracy for Sense Voltage Between +75mV and +1250mV
- Full-Scale Sense Voltage
- +100mV with a Gain of 25
- +250mV with a Gain of 10
- +1250mV with a Gain of 2
- Common-Mode Range, LDMOS Drain Voltage: +5V to +32V
- Adjustable Low-Noise 0 to AVDD Output Gate Bias Voltage Range
- Fast Clamp to AGND for LDMOS Protection
- 12-Bit DAC Control of Gate with Temperature
- Internal Die Temperature Measurement
- 2-Channel External Temperature Measurement through Remote Diodes
- Internal 12-Bit ADC Measurement for Temperature, Current, and Voltage Monitoring
- User-Selectable Serial Interface
- 400kHz/1.7MHz/3.4MHz I²C-Compatible Interface
- 16MHz SPI-/MICROWIRE-Compatible Interface
Applications/Uses
- Cellular Base Stations
- Feed-Forward Power Amps
- Industrial Process Control
- Microwave Radio Links
- Transmitters
Description
The MAX11008 includes two gate-drive channels, each consisting of a 12-bit DAC to generate the positive gate voltage for biasing the LDMOS devices. Each gate-drive output supplies up to ±2mA of gate current. The gate-drive amplifier is current-limited to ±25mA and features a fast clamp to AGND.
The MAX11008 contains 4Kb of on-chip, nonvolatile EEPROM organized as 256 bits x 16 bits to store LUTs and register information. The device operates from either a 4-wire 16MHz SPI™-/MICROWIRE™-compatible or an I²C-compatible serial interface.
The MAX11008 operates from a +4.75V to +5.25V analog supply with a typical supply current of 2mA, and a +2.7V to +5.25V digital supply with a typical supply of 3mA. The device is packaged in a 48-pin, 7mm x 7mm, thin QFN package and operates over the extended (-40°C to +85°C) temperature range.
Technical Docs
Data Sheet | Dual RF LDMOS Bias Controller with Nonvolatile Memory | Dec 08, 2008 | |
App Note | Implementing a MAX1385-Based Control Loop in C/C++ |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .