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MAX1449
Analog Data Converters Analog-to-Digital Converters MAX1449
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MAX98096

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Product Details

See parametric specs for High-Speed ADCs (> 5Msps)

Key Features

See parametric specs for High-Speed ADCs (> 5Msps)
Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 10
# Input Channels 1
Sample Rate (Msps) (max) 105
Data Bus Interface µP/10
AC Specs (MHz) (@ fIN) 20
SFDR (dBc) (min) 72
ENOB (bits) (min) 9.3
SINAD (dB) 59
SNR (dB) 58.5
THD (dB) -70
DNL (±LSB) 0.5
INL (±LSB) 0.75
Package/Pins TQFP/32
Budgetary
Price (See Notes) 		25.46
See parametric specs for High-Speed ADCs (> 5Msps)
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Simplified Block Diagram

Technical Docs

Data Sheet 10-Bit, 105Msps, Single +3.3V, Low-Power ADC with Internal Reference Nov 09, 2004
App Note Improving Gain Flatness without Sacrificing Dynamic Performance in High-IF ADCs
App Note Coherent Sampling Calculator (CSC)
App Note Proper Input Network Selection Achieves Optimum Dynamic Performance and Excellent Gain Flatness in High-Speed ADCs
Tutorial Differential Gain and Phase—Why Measure It, if You Cannot See It? \r\n
Tutorial Selecting the Optimum Test Tones and Test Equipment for Successful High-Speed ADC Sinewave Testing
Tutorial Coherent Sampling vs. Window Sampling
Tutorial Dynamic Testing of High-Speed ADCs, Part 2
Tutorial Defining and Testing Dynamic Parameters in High-Speed ADCs, Part 1
Tutorial Understanding Flash ADCs
Tutorial Multiply Your Sampling Rate with Time-Interleaved Data Converters

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Parameters

Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 10
# Input Channels 1
Sample Rate (Msps) (max) 105
Data Bus Interface µP/10
AC Specs (MHz) (@ fIN) 20
SFDR (dBc) (min) 72
ENOB (bits) (min) 9.3
SINAD (dB) 59
SNR (dB) 58.5
THD (dB) -70
DNL (±LSB) 0.5
INL (±LSB) 0.75
Package/Pins TQFP/32
Budgetary
Price (See Notes) 		25.46
See parametric specs for High-Speed ADCs (> 5Msps)

Key Features

  • Single 3.3V Operation
  • Excellent Dynamic Performance
    • 58.5dB SNR at fIN = 20MHz
    • 72dBc SFDR at fIN = 20MHz
  • Low Power
    • 62mA (Normal Operation)
    • 5µA (Shutdown Mode)
  • Fully Differential Analog Input
  • Wide 2VP-P Differential Input Voltage Range
  • 400MHz -3dB Input Bandwidth
  • On-Chip 2.048V Precision Bandgap Reference
  • CMOS-Compatible Three-State Outputs
  • 32-Pin TQFP Package
  • Evaluation Kit Available (MAX1448 EV Kit)

Applications/Uses

  • Baseband and IF Digitization
  • CCD Imaging
  • Digital Set-Top Boxes
  • Ultrasound Imaging
  • Video Digitizing Applications

Description

The MAX1449 3.3V, 10-bit analog-to-digital converter (ADC) features a fully differential input, a pipelined 10-stage ADC architecture with wideband track-and-hold (T/H), and digital error correction incorporating a fully differential signal path. The ADC is optimized for lowpower, high-dynamic performance in imaging and digital communications applications. The converter operates from a single 2.7V to 3.6V supply, consuming only 186mW while delivering a 58.5dB (typ) signal-to-noise ratio (SNR) at a 20MHz input frequency. The fully differential input stage has a -3dB 400MHz bandwidth and may be operated with single-ended inputs. In addition to low operating power, the MAX1449 features a 5µA power-down mode for idle periods.

An internal 2.048V precision bandgap reference is used to set the ADC's full-scale range. A flexible reference structure allows the user to supply a buffered, direct, or externally derived reference for applications requiring increased accuracy or a different input voltage range.

See a parametric table of the complete family of pin-compatible, 10-bit high-speed ADCs.

The MAX1449 has parallel, offset binary, CMOS-compatible, three-state outputs that can be operated from 1.7V to 3.6V to allow flexible interfacing. The device is available in a 5mm x 5mm 32-pin TQFP package and is specified over the extended industrial (-40°C to +85°C) temperature range.

Simplified Block Diagram

MAX1449: Functional Diagram MAX1449: Functional Diagram Zoom icon

Technical Docs

Data Sheet 10-Bit, 105Msps, Single +3.3V, Low-Power ADC with Internal Reference Nov 09, 2004
App Note Improving Gain Flatness without Sacrificing Dynamic Performance in High-IF ADCs
App Note Coherent Sampling Calculator (CSC)
App Note Proper Input Network Selection Achieves Optimum Dynamic Performance and Excellent Gain Flatness in High-Speed ADCs
Tutorial Differential Gain and Phase—Why Measure It, if You Cannot See It? \r\n
Tutorial Selecting the Optimum Test Tones and Test Equipment for Successful High-Speed ADC Sinewave Testing
Tutorial Coherent Sampling vs. Window Sampling
Tutorial Dynamic Testing of High-Speed ADCs, Part 2
Tutorial Defining and Testing Dynamic Parameters in High-Speed ADCs, Part 1
Tutorial Understanding Flash ADCs
Tutorial Multiply Your Sampling Rate with Time-Interleaved Data Converters

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .