Top

Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs

High-Density, Ultra-Low-Power Octal 12-Bit ADC with Space-Saving Serial LVDS Interface

Product Details

Key Features

Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 12
# Input Channels 8
Sample Rate (Msps) (max) 40
Data Bus Interface Serial LVDS
AC Specs (MHz) (@ fIN) 19.3
SFDR (dBc) (min) 90
ENOB (bits) (min) 11.3
SINAD (dB) 69.6
SNR (dB) 69.6
THD (dB) -92
DNL (±LSB) 0.25
INL (±LSB) 0.4
Package/Pins TQFP/100
Budgetary
Price (See Notes)
79.72
View Less

Simplified Block Diagram

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Parameters

Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 12
# Input Channels 8
Sample Rate (Msps) (max) 40
Data Bus Interface Serial LVDS
AC Specs (MHz) (@ fIN) 19.3
SFDR (dBc) (min) 90
ENOB (bits) (min) 11.3
SINAD (dB) 69.6
SNR (dB) 69.6
THD (dB) -92
DNL (±LSB) 0.25
INL (±LSB) 0.4
Package/Pins TQFP/100
Budgetary
Price (See Notes)
79.72

Key Features

  • Excellent Dynamic Performance
    • 69.9dB SNR at 5.3MHz
    • 96dBc SFDR at 5.3MHz
    • 95dB Channel Isolation
  • Ultra-Low Power
    • 93mW per Channel (Normal Operation)
    • Fast 200µs Wake-Up Time from Standby
  • Serial LVDS Outputs
  • Pin-Selectable LVDS/SLVS (Scalable Low-Voltage Signal) Mode
  • LVDS Outputs Support Up to 30 Inches FR-4 Backplane Connections
  • Test Mode for Digital Signal Integrity
  • Fully Differential Analog Inputs
  • Wide Differential Input Voltage Range (1.4VP-P)
  • On-Chip 1.24V Precision Bandgap Reference
  • Clock Duty-Cycle Equalizer
  • Compact, 100-Pin TQFP Package with Exposed Pad
  • Evaluation Kit Available (Order MAX1436BEVKIT)

Applications/Uses

  • Instrumentation
  • Multichannel Communications
  • Ultrasound and Medical Imaging

Description

The MAX1436B octal, 12-bit analog-to-digital converter (ADC) features fully differential inputs, a pipelined architecture, and digital error correction incorporating a fully differential signal path. This ADC is optimized for low-power and high-dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1436B operates from a 1.8V single supply and consumes only 743mW (93mW per channel) while delivering a 69.9dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1436B features a low-power standby mode for idle periods.

An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise.

A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip PLL generates the high-speed serial low-voltage differential signal (LVDS) clock.

The MAX1436B has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two's complement or binary format.

The MAX1436B offers a maximum sample rate of 40Msps. See the Pin-Compatible Versions table in the full data sheet for higher-speed versions. This device is available in a small, 14mm x 14mm x 1mm, 100-pin TQFP package with exposed pad and is specified for the extended industrial (-40°C to +85°C) temperature range.

Simplified Block Diagram

MAX1436B: Functional Diagram MAX1436B: Functional Diagram Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .