15-Bit, 80Msps ADC with -78.4dBFS Noise Floor for IF Applications

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The MAX1428 is a 5V, high-speed, high-performance analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) and a 15-bit converter core. The MAX1428 is optimized for multichannel, multimode receivers, which require the ADC to meet very stringent dynamic performance requirements. With a noise floor of -78.4dBFS, the MAX1428 allows for the design of receivers with superior sensitivity.

The MAX1428 achieves two-tone, spurious-free dynamic range (SFDR) of -82dBc for input tones of 69MHz and 71MHz. Its excellent signal-to-noise ratio (SNR) of 73.9dB and single-tone SFDR performance (SFDR1/SFDR2) of 83dBc/91dBc at fIN = 70MHz and a sampling rate of 80Msps make this part ideal for high-performance digital receivers.

The MAX1428 operates from an analog 5V and a digital 3V supply, features a 2.56VP-P full-scale input range, and allows for a sampling speed of up to 80Msps. The input T/H operates with a -1dB full-power bandwidth of 260MHz.

The MAX1428 features parallel, CMOS-compatible outputs in two's-complement format. To enable the interface with a wide range of logic devices, this ADC provides a separate output driver power-supply range of 2.3V to 3.5V. The MAX1428 is manufactured in an 8mm x 8mm, 56-pin thin QFN package with exposed paddle (EP) for low thermal resistance, and is specified for the extended industrial (-40°C to +85°C) temperature range.

Note that IF parts MAX1418, MAX1428, and MAX1430 (see Pin-Compatible Higher/Lower Speed Versions Selection table in the full data sheet) are recommended for applications that require high dynamic performance for input frequencies greater than fCLK/3. Unlike its baseband counterpart MAX1427, the MAX1428 is optimized for input frequencies greater than fCLK/3.

Key Features

  • 80Msps Minimum Sampling Rate
  • -78.4dBFS Noise Floor
  • Excellent Dynamic Performance
    • 73.9dB SNR at fIN = 70MHz and AIN = -2dBFS
    • 83dBc/91dBc Single-Tone SFDR1/SFDR2 at fIN = 70MHz and AIN = -2dBFS
    • -82dB Multitone SFDR at fIN1 = 69MHz and fIN2 = 71MHz
  • Less than 0.25ps Sampling Jitter
  • Fully Differential Analog Input Voltage Range of 2.56VP-P
  • CMOS-Compatible Two's-Complement Data Output
  • Separate Data Valid Clock and Overrange Outputs
  • Flexible-Input Clock Buffer
  • EV Kit Available for MAX1428 (Order MAX1427EVKIT)


  • Antenna Array Processing
  • Cellular Base-Station Transceiver Systems (BTS)
  • E911 Location Receivers
  • Multistandard Receivers
  • Power Amplifier Linearity Correction
  • Single- and Multicarrier Receivers
  • Wireless Local Loop (WLL)

Technical Documents

App Note 1929 Understanding ADC Noise for Small and Large Signal Inputs for Receiver Applications

Quality and Environmental Data

Request Reliability Report for: MAX1428 
Lead-Free Package Tin (Sn) Whisker Reports
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Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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