Simplified Block Diagram
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- 65Msps Minimum Sampling Rate
- -79.3dBFS Noise Floor
- Excellent Dynamic Performance
- 76.2dB SNR at fIN=15MHz and AIN = -1dBFS
- 93.1dBc/95.5dBc Single-Tone SFDR1/SFDR2 at fIN = 15MHz and AIN = -1dBFS
- -91dBc Multitone SFDR at fIN1 = 10MHz and fIN2 = 15MHz
- Less than 0.25ps Sampling Jitter
- Fully Differential Analog Input Voltage Range of 2.56VP-P
- CMOS-Compatible Two's-Complement Data Output
- Separate Data Valid Clock and Overrange Outputs
- Flexible-Input Clock Buffer
- EV Kit Available for the MAX1419 (Order MAX1427EVKIT)
- Antenna Array Processing
- Cellular Base-Station Transceiver Systems (BTS)
- E911 Location Receivers
- Multistandard Receivers
- Power Amplifier Linearity Correction
- Single- and Multicarrier Receivers
- Wireless Local Loop (WLL)
The MAX1419 achieves two-tone, spurious-free dynamic range (SFDR) of -91dBc for input tones of 10MHz and 15MHz. Its excellent signal-to-noise ratio (SNR) of 76.2dB and single-tone SFDR performance (SFDR1/SFDR2) of 93.1dBc/95.5dBc at fIN = 15MHz and a sampling rate of 65Msps make this part ideal for high-performance digital receivers.
The MAX1419 operates from an analog 5V and a digital 3V supply, features a 2.56VP-P full-scale input range, and allows for a sampling speed of up to 65Msps. The input T/H operates with a -1dB full-power bandwidth of 200MHz.
The MAX1419 features parallel, CMOS-compatible outputs in two's-complement format. To enable the interface with a wide range of logic devices, this ADC provides a separate output driver power-supply range of 2.3V to 3.5V. The MAX1419 is manufactured in an 8mm x 8mm, 56-pin thin QFN package with exposed paddle (EP) for low thermal resistance, and is specified for the extended industrial (-40°C to +85°C) temperature range.
Note that IF parts MAX1418, MAX1428, and MAX1430 (see the Pin-Compatible Higher/Lower Speed Versions Selection table in the full data sheet) are recommended for applications that require high dynamic performance for input frequencies greater than fCLK/3. The MAX1419 is optimized for input frequencies of less than fCLK/3.