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Analog-to-Digital Converters
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MAX1403
+3V, 18-Bit, Low-Power, Multichannel, Oversampling (Sigma-Delta) ADC
Best Linearity for +3V, 18-Bit Sigma Delta
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Key Features
Applications/Uses
Parametric specs for Precision ADCs (< 5Msps)
| Resolution (bits) (ADC) | 18 |
| # Input Channels | 5 |
| Conv. Rate (ksps) (max) | 4.8 |
| Data Bus | SPI |
| ADC Architecture | Sigma-Delta |
| Diff/S.E. Input | Diff. Only |
| External VREF (V) (min) | 0 |
| External VREF (V) (max) | 1.25 |
| Unipolar VIN (V) (max) | 1.25 |
| Bipolar VIN (±V) (max) | 1.25 |
| INL (±LSB) | 3 |
| Package/Pins | SSOP/28 |
| Budgetary Price (See Notes) | 13.52 |
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Parameters
Parametric specs for Precision ADCs (<u><</u> 5Msps)
| Resolution (bits) (ADC) | 18 |
| # Input Channels | 5 |
| Conv. Rate (ksps) (max) | 4.8 |
| Data Bus | SPI |
| ADC Architecture | Sigma-Delta |
| Diff/S.E. Input | Diff. Only |
| External VREF (V) (min) | 0 |
| External VREF (V) (max) | 1.25 |
| Unipolar VIN (V) (max) | 1.25 |
| Bipolar VIN (±V) (max) | 1.25 |
| INL (±LSB) | 3 |
| Package/Pins | SSOP/28 |
| Budgetary Price (See Notes) | 13.52 |
Key Features
- 18-Bit Resolution, Sigma-Delta ADC
- 16-Bit Accuracy with No Missing Codes to 480sps
- Matched On-Board Current Sources (200µA) for Sensor Excitation
- Low Quiescent Current
- 250µA (operating mode)
- 2µA (power-down mode)
- 3 Fully Differential or 5 Pseudo-Differential Signal Input Channels
- 2 Additional, Fully Differential Calibration Channels/Auxiliary Input Channels
- Programmable Gain and Offset
- Fully Differential Reference Inputs
- Converts Continuously or On Command
- Automatic Channel Scanning and Continuous Data Output Mode
- Operates with Analog and Digital Supplies from +2.7V to +3.6V
- SPI™/QSPI™-Compatible 3-Wire Serial Interface
- 28-Pin SSOP Package
Applications/Uses
- Loop-Powered Systems
- Portable Industrial Instruments
- Portable Weight Scales
- Pressure Sensors and Transducers
Description
The MAX1403 18-bit, low-power, multichannel, serial-output analog-to-digital converter (ADC) features matched 200µA current sources for sensor excitation. This ADC uses a sigma-delta modulator with a digital decimation filter to achieve 16-bit accuracy. The digital filter's user-selectable decimation factor allows the conversion resolution to be reduced in exchange for a higher output data rate. True 16-bit performance is achieved at an output data rate of up to 480sps. In addition, the modulator sampling frequency may be optimized for either lowest power dissipation or highest throughput rate. The MAX1403 operates from +3V.
This device offers three fully differential input channels that may be independently programmed with a gain between +1V/V and +128V/V. Furthermore, it can compensate an input-referred DC offset up to 117% of the selected full-scale range. These three differential channels may also be configured to operate as five pseudo-differential input channels. Two additional, fully differential system-calibration channels are provided for gain and offset error correction.
The MAX1403 can be configured to sequentially scan all signal inputs and provide the results via the serial interface with minimum communications overhead. When used with a 2.4576MHz or 1.024MHz master clock, the digital decimation filter can be programmed to produce zeros in its frequency response at the line frequency and associated harmonics, ensuring excellent line rejection without the need for further postfiltering.
The MAX1403 is available in a 28-pin SSOP package.
This device offers three fully differential input channels that may be independently programmed with a gain between +1V/V and +128V/V. Furthermore, it can compensate an input-referred DC offset up to 117% of the selected full-scale range. These three differential channels may also be configured to operate as five pseudo-differential input channels. Two additional, fully differential system-calibration channels are provided for gain and offset error correction.
The MAX1403 can be configured to sequentially scan all signal inputs and provide the results via the serial interface with minimum communications overhead. When used with a 2.4576MHz or 1.024MHz master clock, the digital decimation filter can be programmed to produce zeros in its frequency response at the line frequency and associated harmonics, ensuring excellent line rejection without the need for further postfiltering.
The MAX1403 is available in a 28-pin SSOP package.
Technical Docs
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
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