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2x4-Channel, Simultaneous-Sampling, 14-Bit DAS

First 14-Bit, 8-Channel, Simultaneous-Sampling ADC for Industrial Applications

Product Details

Key Features

Parametric specs for Precision ADCs (< 5Msps)
Resolution (bits) (ADC) 14
# Input Channels 8
Conv. Rate (ksps) (max) 250
Data Bus µP/14
ADC Architecture SAR
Diff/S.E. Input S.E. Only
Internal VREF (V) (nominal) 2.5
External VREF (V) (min) 2.25
External VREF (V) (max) 2.75
Bipolar VIN (±V) (max) 2.5
INL (±LSB) 2
Package/Pins SSOP/36
Budgetary
Price (See Notes)
21.08
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Simplified Block Diagram

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Parameters

Parametric specs for Precision ADCs (<u><</u> 5Msps)
Resolution (bits) (ADC) 14
# Input Channels 8
Conv. Rate (ksps) (max) 250
Data Bus µP/14
ADC Architecture SAR
Diff/S.E. Input S.E. Only
Internal VREF (V) (nominal) 2.5
External VREF (V) (min) 2.25
External VREF (V) (max) 2.75
Bipolar VIN (±V) (max) 2.5
INL (±LSB) 2
Package/Pins SSOP/36
Budgetary
Price (See Notes)
21.08

Key Features

  • Four Simultaneous-Sampling T/H Amplifiers with Two Multiplexed Inputs (eight single-ended inputs total)
  • 3µs Conversion Time per Channel
  • Throughput:
    • 250ksps (1 channel)
    • 142ksps (2 channels)
    • 100ksps (3 channels)
    • 76ksps (4 channels)
  • Input Range:
    • ±5V (MAX125)
    • ±2.5V (MAX126)
  • Fault-Protected Input Multiplexer (±17V)
  • ±5V Supplies
  • Internal +2.5V or External Reference Operation
  • Programmable On-Board Sequencer
  • High-Speed Parallel DSP Interface

Applications/Uses

  • Digital Signal Processing (DSP)
  • Multiphase Motor Control
  • Power-Factor Monitoring
  • Power-Grid Synchronization
  • Vibration and Waveform Analysis

Description

The MAX125/MAX126 are high-speed, multichannel, 14-bit data-acquisition systems (DAS) with simultaneous track/holds (T/Hs). These devices contain a 14-bit, 3µs, successive-approximation analog-to-digital converter (ADC), a +2.5V reference, a buffered reference input, and a bank of four simultaneous-sampling T/H amplifiers that preserve the relative phase information of the sampled inputs. The MAX125/MAX126 have two multiplexed inputs for each T/H, allowing a total of eight inputs. In addition, the converter is overvoltage tolerant to ±17V; a fault condition on any channel will not harm the IC. Available input ranges are ±5V (MAX125) and ±2.5V (MAX126).

An on-board sequencer converts one to four channels per active-low CONVST pulse. In the default mode, one T/H output (CH1A) is converted. An interrupt signal (active-low INT) is provided after the last conversion is complete. Convert two, three, or four channels by reprogramming the MAX125/MAX126 through the bidirectional parallel interface. Once programmed, the MAX125/MAX126 continue to convert the specified number of channels per active-low CONVST pulse until they are reprogrammed. The channels are converted sequentially, beginning with CH1. The INT signal always follows the end of the last conversion in a conversion sequence. The ADC converts each assigned channel in 3µs and stores the result in an internal 14x4 RAM. Upon completion of the conversions, data can be accessed by applying successive pulses to the active-low RD pin. Four successive reads access four data words sequentially.

The parallel interface's data-access and bus-release timing specifications are compatible with most popular digital signal processors and 16-bit/32-bit microprocessors, so the MAX125/MAX126 conversion results can be accessed without resorting to wait states.

Simplified Block Diagram

MAX125, MAX126: Typical Operating Circuit MAX125, MAX126: Typical Operating Circuit Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .