14-Bit, 95Msps, 3.3V ADC
DescriptionThe MAX12555 is a 3.3V, 14-bit, 95Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single ended or differential signals. The MAX12555 is optimized for high dynamic performance, low power, and small size. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX12555 ideal for intermediate frequency (IF) sampling applications.
Powered from a single 3.3V supply, the MAX12555 consumes only 497mW while delivering a typical 72.1dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. In addition to low operating power, the MAX12555 features a 300µW power-down mode to conserve power during idle periods.
A flexible reference structure allows the MAX12555 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX12555 provides a common- mode reference to simplify design and reduce external component count in differential analog input circuits.
The MAX12555 supports either a single-ended or differential input clock. Wide variations in the clock duty cycle are compensated with the ADC's internal dutycycle equalizer (DCE).
ADC conversion results are available through a 14-bit, parallel, CMOS-compatible output bus. The digital output format is pin selectable to be either two's complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate digital power input accepts a wide 1.7V to 3.6V supply, allowing the MAX12555 to interface with various logic levels.
The MAX12555 is available in a 6mm x 6mm x 0.8mm, 40-pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range.
- Direct IF Sampling Up to 400MHz
- Excellent Dynamic Performance
- 74dB/72dB SNR at fIN = 3MHz/175MHz
- 87.4dBc/76.2dBc SFDR at fIN = 3MHz/175MHz
- Low Noise Floor: 74.6dBFS
- 3.3V Low-Power Operation
- 465mW (Single-Ended Clock Mode)
- 497mW (Differential Clock Mode)
- 300µW (Power-Down Mode)
- Fully Differential or Single-Ended Analog Input
- Adjustable Full-Scale Analog Input Range
- ±0.35V to ±1.10V
- Common-Mode Reference
- CMOS-Compatible Outputs in Two's Complement or Gray Code
- Data-Valid Indicator Simplifies Digital Interface
- Data Out-of-Range Indicator
- Miniature, 6mm x 6mm x 0.8mm 40-Pin Thin QFN Package with Exposed Paddle
- Evaluation Kit Available (Order MAX12555EVKIT)
- IF and Baseband Communication Receivers: Cellular, Point-to-Point Microwave, HFC, WLAN
- Low-Power Data Acquisition
- Medical Imaging Including Positron Emission Tomography (PET)
- Portable Instrumentation
- Video Imaging
|Part Number||Input Channels||Resolution|
|Data Bus Interface||Package/Pins||Budgetary|
|max||@ fIN||min||typ||See Notes|
Technical DocumentsTutorial 4993 Reduce the Chances of Human Error: Part 2, Super Amps and Filters for Analog Interface
Tutorial 4700 Introduction to Medical Instruments and Growing Trend for Point-of-Care and Near-Patient Testing
App Note 3716 Folded-Frequency Calculator
App Note 3491 Schematic and Layout Guidelines for High-Speed Data Converters
App Note 3190 Coherent Sampling Calculator (CSC)
Tools & Models
|Device||Fab Process||Technology||Sample size||Rejects||FIT at 25°C||FIT at 55°C||Material Composition|
|Tutorial||4993||Reduce the Chances of Human Error: Part 2, Super Amps and Filters for Analog Interface|
|Tutorial||4700||Introduction to Medical Instruments and Growing Trend for Point-of-Care and Near-Patient Testing|
|App Note||3716||Folded-Frequency Calculator|
|App Note||3491||Schematic and Layout Guidelines for High-Speed Data Converters|
|App Note||3190||Coherent Sampling Calculator (CSC)|