A flexible reference structure allows the MAX12527 to use the internal 2.048V bandgap reference or accept an externally applied reference and allows the reference to be shared between the two ADCs. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX12527 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits.
The MAX12527 supports either a single-ended or differential input clock. User-selectable divide-by-two (DIV2) and divide-by-four (DIV4) modes allow for design flexibility and help eliminate the negative effects of clock jitter. Wide variations in the clock duty cycle are compensated with the ADC's internal duty-cycle equalizer (DCE).
The MAX12527 features two parallel, 12-bit-wide, CMOS-compatible outputs. The digital output format is pin-selectable to be either two's complement or Gray code. A separate power-supply input for the digital outputs accepts a 1.7V to 3.6V voltage for flexible interfacing with various logic levels. The MAX12527 is available in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package with exposed paddle (EP), and is specified for the extended (-40°C to +85°C) temperature range.
For a 14-bit, pin-compatible version of this ADC, refer to the MAX12557 data sheet.
|Part Number||Input Chan.||Resolution|
|Full Pwr. BW|
|Data Bus Interface||Package/Pins|
|max ≥||@ fIN||min||min||typ|
|See All High-Speed ADCs (> 5Msps) (53)|
| Pricing Notes: |
This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific and version-specific prices and delivery, please see the price and availability page or contact an authorized distributor.
|Device||Fab Process||Technology||Sample size||Rejects||FIT at 25°C||FIT at 55°C|
|Tutorial||4993||Reduce the Chances of Human Error: Part 2, Super Amps and Filters for Analog Interface|
|App Note||3942||Optimize the Buffer Amplifier/ADC Connection|
|App Note||3716||Folded-Frequency Calculator|
|App Note||3558||MAX12557 Schematic and Layout Suggestions|
|Evaluation Board||5064||MAX12558EVKIT Evaluation Kit for the MAX12527, MAX12528, MAX12529, MAX12557, MAX12558, and MAX12559|
|Evaluation Board||5064||MAX12529EVKIT Evaluation Kit for the MAX12527, MAX12528, MAX12529, MAX12557, MAX12558, and MAX12559|
|Evaluation Board||5064||MAX12528EVKIT Evaluation Kit for the MAX12527, MAX12528, MAX12529, MAX12557, MAX12558, and MAX12559|
|Evaluation Board||5064||MAX12527EVKIT Evaluation Kit for the MAX12527, MAX12528, MAX12529, MAX12557, MAX12558, and MAX12559|
|Evaluation Board||5064||MAX12557EVKIT Evaluation Kit for the MAX12527, MAX12528, MAX12529, MAX12557, MAX12558, and MAX12559|
|Evaluation Board||5064||MAX12559EVKIT Evaluation Kit for the MAX12527, MAX12528, MAX12529, MAX12557, MAX12558, and MAX12559|